Senior PHY Design Engineer

Brightecs Innovation Pte Ltd; Singapore; On-site; SGD 120,000 - 160,000; Full time

Job summary

Brightecs Innovation Pte. Ltd. is seeking an experienced engineer to design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6) in Singapore.

You will optimize PPA and SI while delivering robust silicon through JEDEC-compliant methods and advanced node implementations. Responsibilities include modeling channel losses, crosstalk, jitter and eye diagrams, designing impedance-matching networks, and collaborating with layout, digital, verification and firmware teams to ensure

Qualifications

• Bachelor’s degree or above in Electrical and Electronic Engineering (EEE).
• 8+ years of relevant experience in similar field in semiconductor industry.

Responsibilities

• Design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6).
• Optimize power, performance, area (PPA) and signal integrity (SI).
• Model and simulate channel losses, crosstalk, jitter, and eye diagrams.
• Ensure JEDEC DDR5-6400 MT/s compliance.
• Design impedance-matching networks and noise-suppression circuits.
• Implement designs in FinFET/7nm/5nm nodes; address PVT variations and reliability (TDDB, EM/IR).
• Collaborate with layout on floor planning, matching and parasitic extraction.
• Develop test plans for lab characterization and ATE; debug silicon with oscilloscopes, BERTs, protocol analyzers.
• Perform shmoo plotting, margin analysis, and yield improvement.
• Collaborate with digital design, verification, and firmware teams for PHY integration; support package/PCB teams; document specs and test results.

Skills

DDR protocols

Analog design

Signal integrity

High-speed I/O

PPA optimization

Cross-functional collaboration

Education

Bachelor’s degree in Electrical and Electronic Engineering

Tools

Cadence Virtuoso

Cadence Spectre

HSPICE

ADS

EMX

Job description

• Design high-speed analog circuits for DDR PHY interfaces (DDR4/DDR5/LPDDR5/6).
• Optimize power, performance, area (PPA), and signal integrity (SI).

2. Signal/Power Integrity (SI/PI) Analysis.

• Model and simulate channel losses, crosstalk, jitter, and eye diagrams.
• Ensure compliance with JEDEC standards (e.g., DDR5-6400 MT/s).
• Design impedance-matching networks and noise-suppression circuits.

3. Process Technology Adaptation.

• Implement designs in advanced nodes (FinFET, 7nm/5nm and below).
• Address PVT (Process-Voltage-Temperature) variations and reliability challenges (TDDB, EM/IR).
• Collaborate with layout engineers on floor planning, matching, and parasitic extraction.

4. Validation & Testing.

• Develop test plans for lab characterization and ATE (Automated Test Equipment).
• Debug silicon failures using oscilloscopes, BERTs, and protocol analyzers.
• Perform shmoo plotting, margin analysis, and yield improvement.

5. Cross-Functional Collaboration.

• Work with digital design, verification, and firmware teams for PHY integration.
• Support package/PCB teams on SI/PI optimization.
• Document design specs, simulation reports, and test results.

Required Qualifications:

1. Bachelor’s degree or above in Electrical and Electronic Engineering (EEE).

2. With more than 8 years relevant experience in similar filed in semiconductor industry.

Technical Skills:

• Proficiency in EDA tools: Cadence Virtuoso, Spectre, HSPICE, ADS, EMX.
• Hands-on experience with DDR protocols (JEDEC DDR4/5, LPDDR5/6).
• Strong knowledge of analog fundamentals: noise analysis, stability, feedback systems.
• Experience in high-speed I/O design (>6.4 Gbps for DDR5).

Preferred Expertise:

• Design tape-out experience in FinFET/SOI technologies.
• Familiarity with SerDes, HBM, or other high-speed interfaces.

About Us

Brightecs Innovation Pte. Ltd. (BIP) is a private limited company incorporated in Singapore, founded in September 2025. As a newly established, technology-oriented startup, our core business is currently focused on silicon IP for intelligent computing.

At the core of our operations is our R&D center, Superam Academy of Semiconductor Research (Superam), a fabless chip research institution also based in Singapore. It specializes in high-end semiconductor IP services, offering diverse IP solutions and standard cell libraries for advanced CMOS technologies by employing Design-Technology-Co-Optimization (DTCO) technology. we enable our customers to achieve full optimization of Power, Performance, and Area (PPA) when designing on foundries' unique processes.

As our business continues to grow, BIP is committed to expanding its capabilities and scope into broader areas of technology innovation. We invite talented professionals to join us on this exciting journey. For more company information, please visit www.bipsuperam.com.

Why Join BIP

At BIP, you will be a founding contributor to something extraordinary. We are a young, passionate team driven by curiosity and a shared ambition to push the boundaries of technology. Here, your ideas matter, your contributions are visible, and your growth is limited only by your ambition. As we expand into new frontiers, we invite you to grow with us, take on challenges that inspire you, and help shape the future from day one.