senior IC layout engineer

ASTRAWAVE TECHNOLOGY PTE. LTD.; Singapore; On-site; SGD 90,000 - 120,000; Full time

Job summary

ASTRAWAVE Technology PTE. LTD. in Singapore seeks an experienced analog/mixed-signal layout and CAD designer to develop high-speed RF solutions alongside circuit design teams.

The role involves tight collaboration to optimize layouts, ensure timing and signal integrity, and maintain schedule commitments. Requirements include at least 6 years in layout engineering, familiarity with Cadence for pcell development, and experience with AMS/RC delay/decoupling strategies.

Qualifications

• Experience with analog/mixed-signal layout.
• Experience in high-speed or RF layout.
• Understanding of AMS layout fundamentals and verification concepts.
• Proficient with Cadence tools for pcell development and layout automation.

Responsibilities

• Realize layout design from schematic.
• Layout implementation: floor planning, device placement, routing and integrity optimization.
• Perform DRC/LVS/ERC/PERC/LVL and physical verification.
• Prepare layout deliverables and review layouts for quality.
• Collaborate with junior engineers to ensure layout quality.

Skills

AMS layout fundamentals

High-speed RF layout

Teamwork

Scheduling adherence

Education

Diploma or Bachelor’s in Electrical/Computer/Electronics Engineering

Tools

Cadence

pcell development scripting (Perl/Python/Tcl)

Job description

Job Description

The Role

ASTRAWAVE develops chips for Data Processing, IP Licensing, Network, Bus, Chiplet Interconnect as well as Chip Customization for different customers. We arecurrently seeking experienced analog mixed signal layout and CAD designers tojoin our team in the development of high speed/RF solutions which will be usedto complement our current products.

The Person

Work closely with circuit design engineers to optimize layout to meet specification.

Team player and strong commitment to schedules.

Able to work in a multi-cultural environment.

Key Responsibilities

- Realize layout design from schematic presentation.

- Layout design implementation includes the following functions:

• - Floor planning and device placement
• -Power and Signal routings and Integrity optimization
• -DRC/LVS/ERC/ANT/ESD/PERC/LVL and necessary Physical Verification
• -Passing DRC rules and ensuring LVS
• -Preparing material and reviewing of layout
• -Checklist/Methodology to ensure quality of layout
• - Layout methodology and enhancement

Participate in post layout adjustments and block/IP activities.

Good understanding of AMS layout fundamentals/EMIR/RC delay/DecouplingCaps/Latch-up.

Preferred Experience

Experience working on technology node below 16nm.

Experience working on high-speed or RF layout.

Experience in TX/RX/PLL/ADC/DAC/etc. is a plus.

Experience working with Cadence skills or equivalent tools for pcell development(perl/python/tcl) and automation to increase layout productivity.

Understanding of process technology and circuit design.

Understanding of analog layout physical verification CAD setup.

At least 6 years of hands-on working experience in layout engineering.

Experience working with leading industry CAD tools, methodology and finfet technology.

Experience with analog/digital on top (chip-top) integration is a plus point.

Providing layout guidance to juniors ensuring quality layouts.

Academic Credentials

Diploma or bachelor’s in electrical/computer/electronics engineering or equivalent.