Senior FPGA Engineer

SEARCH STAFFING SERVICES PTE. LTD.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Our client in Singapore seeks a Senior Engineer, FPGA to join the team and drive FPGA prototyping, RTL improvements, and timing optimization for SoC pre-silicon verification. You will collaborate with SoC Design, Verification, Software and System Test teams to enable rapid validation of successive SoC iterations.

The role requires 8+ years of hands-on FPGA experience, strong Verilog/RTL skills, and familiarity with Xilinx Vivado and Intel Quartus Prime Pro.

Qualifications

• Strong FPGA experience with 8+ years hands-on FPGA design, prototyping, bring-up and debugging.
• RTL/Verilog expertise with complete RTL-to-bitstream flow including synthesis and timing closure.
• Experience with FPGA prototyping platforms and board bring-up.

Responsibilities

• Develop, implement and bring up FPGA images for SoC pre-silicon prototyping.
• Modify and debug RTL for FPGA implementation from RTL through bitstream generation.
• Define and implement FPGA timing constraints and perform timing analysis for performance optimization.
• Debug FPGA/RTL issues using FPGA tools, oscilloscopes and analyzers; support regression testing.
• Collaborate with SoC Design, Verification, Software and SystemTest teams for repeatable FPGA builds.

Skills

FPGA design

RTL/Verilog

Prototyping platforms

Timing analysis

Hardware debugging

SoC development

C

Python

Education

BSEE/BSCE or related degree

Tools

Vivado

Quartus Prime Pro

Oscilloscopes

Logic analyzers

Protocol analyzers

Job description

Our client is a leading startup in the semiconductor field and a leader in designing ultra low-power microprocessors. You will be in a team in Singapore to work with our SoC design, software development, design verification, and system test teams as our primary internal customers for the FPGA images.

Senior Engineer, FPGA

Responsibilities

• FPGA Prototyping & Development - Develop, implement and bring up FPGA images for SoC pre-silicon prototyping, supporting Design Verification, Software Development, Validation and System Test teams.
• RTL& FPGA Implementation - Modify and debug RTL for FPGA implementation taking designs from RTL through synthesis, place-and-route and bitstream generation using Xilinx Vivado/ISE and Intel Quartus Prime Pro.
• Timing& Performance Optimization - Define and implement FPGA timing constraints, perform timing analysis and optimize designs for performance, throughput, resource utilization and reliable FPGA builds.
• Hands-on Debug & Validation - Debug FPGA and RTL issues using FPGA development tools, logic analyzers and protocol analyzers, while supporting system-level regression testing and reproducing/triaging pre- and post-silicon issues.
• Cross-Functional SoC Support - Work closely with SoC Design, Verification, Software and SystemTest teams to deliver repeatable FPGA builds and enable rapid validation of successive SoC design iterations.

Requirements

• Strong FPGA Experience - BSEE/BSCE or related degree with 8+ years of hands-on FPGA design, prototyping, bring-up and debugging, ideally within SoC or embedded systems development.
• RTL& FPGA Tool Expertise - Strong Verilog/RTL experience with a solid understanding of the complete RTL-to-bitstream flow, including synthesis, implementation, timing closure and FPGA debugging; expertise in both Xilinx Vivado and Intel Quartus Prime Pro.
• FPGA Prototyping Platforms - Proven experience developing on FPGA-based prototyping platforms, preferably AMD VU19P and/or Intel Stratix-10, including boardbring-up, partitioning, performance optimization and throughput tuning.
• Timing& Hardware Debugging - Strong understanding of Static Timing Analysis and timing constraints, combined with hands-on laboratory experience using oscilloscopes, logic/protocol analyzers and other debugging instruments.
• SoC& Embedded Development - Familiarity with SoC design/verification flows, simulation, embedded processors and C; experience with SystemVerilog, Python, Git and peripheral protocols such as I²C, I3C, MSPI, UART or USB is advantageous.

EA Personnel Registration No: R1324700