Secure FPGA Design & Verification Fellow (Post-Quantum)

TumCreate; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

TUMCREATE is a multidisciplinary research platform of the Technical University Munich (TUM) at the Singapore Campus. We seek a skilled researcher in FPGA design and verification to implement a post-quantum secure RISC-V core on FPGA and verify it with accelerators for cryptography.

You will work with IC designers and security experts to verify hardware-security features, including side-channel resistance. Excellent English communication is essential in this international team.

Qualifications

• Bachelor's degree with at least two years FPGA design/verification experience.
• Master's degree focusing on hardware security or related design.
• PhD in hardware security, embedded security or circuit design is considered.
• Publications in FPGA design/verification are a strong asset.

Responsibilities

• Perform FPGA implementation of a post-quantum secure RISC-V processor core.
• Perform functional verification and test of the RISC-V based platform including accelerators for post-quantum secure cryptography.
• Research design-time verification of hardware-security features such as side-channel resistance for a post-quantum processor platform.
• Collaborate with IC design and security experts to enable leading-edge IC design.
• Write scientific manuscripts, contribute to project reports, and present findings at conferences and meetings.
• Demonstrate ability to work independently and in international teams.

Skills

FPGA design

Hardware security

Design verification

English communication

Independent & collaborative work

Education

Bachelor's degree in electrical engineering or related fields

Master's degree in electrical engineering or related fields

PhD in hardware security or circuit design

Job description

TUMCREATE is a multidisciplinary research platform of the Technical University Munich (TUM) at the Singapore Campus. We seek a skilled researcher in FPGA design and verification to implement a post-quantum secure RISC-V core on FPGA and verify it with accelerators for cryptography.

You will work with IC designers and security experts to verify hardware-security features, including side-channel resistance. Excellent English communication is essential in this international team.