Research Fellow / Research Associate / Research Engineer (Secure FPGA Design and Verification)

TumCreate; Singapore; On-site; SGD 90,000 - 130,000; Full time

Job summary

TUMCREATE is a multidisciplinary research platform of the Technical University Munich (TUM) at the Singapore Campus. We seek a skilled researcher in FPGA design and verification to implement a post-quantum secure RISC-V core on FPGA and verify it with accelerators for cryptography.

You will work with IC designers and security experts to verify hardware-security features, including side-channel resistance. Excellent English communication is essential in this international team.

Qualifications

• Bachelor's degree with at least two years FPGA design/verification experience.
• Master's degree focusing on hardware security or related design.
• PhD in hardware security, embedded security or circuit design is considered.
• Publications in FPGA design/verification are a strong asset.

Responsibilities

• Perform FPGA implementation of a post-quantum secure RISC-V processor core.
• Perform functional verification and test of the RISC-V based platform including accelerators for post-quantum secure cryptography.
• Research design-time verification of hardware-security features such as side-channel resistance for a post-quantum processor platform.
• Collaborate with IC design and security experts to enable leading-edge IC design.
• Write scientific manuscripts, contribute to project reports, and present findings at conferences and meetings.
• Demonstrate ability to work independently and in international teams.

Skills

FPGA design

Hardware security

Design verification

English communication

Independent & collaborative work

Education

Bachelor's degree in electrical engineering or related fields

Master's degree in electrical engineering or related fields

PhD in hardware security or circuit design

Job description

Research Fellow / Research Associate / Research Engineer (Secure FPGA Design and Verification)

TUMCREATE is a multidisciplinary research platform of the Technical University Munich (TUM) at the Singapore Campus for Research Excellence and Technological Enterprise (CREATE). We are joining forces with universities, public agencies, and industry for the advancement of future technologies.

Our research program on post-quantum Security, ‘QUASAR – QUANTUM SECURITY AND RESILIENCE FOR EMERGING TECHNOLOGIES’ funded by Singapore’s National Research Foundation (NRF), is a collaborative effort between the Technical University Munich (TUM), Fraunhofer Singapore, Nanyang Technological University (NTU), the National University of Singapore (NUS). At TUMCREATE, we will focus on developing an open and verifiable Quantum safe RISC-V processor platform as a foundation for the QUASAR program.

As part of the QUASAR team, you will work alongside renowned scientists in Integrated Circuit (IC) design, security, and quantum technologies.

Please visit www.tum-create.edu.sg for more information about TUMCREATE.

Job Summary

We are seeking a highly motivated and skilled researcher in FPGA Design and Verification. You will explore the integration and implementation of leading-edge post-quantum secure cryptographic algorithms on FPGA in an application context using a RISC-V processors. You will research design verification of security features such as Side-Channel Analysis (SCA) resistance of post-quantum secure cryptographic algorithms. You will be responsible in a team of IC designers for the verification of a RISC-V and for pre-manufacture testing it on FPGA.

This is a fixed term contract until March 2029.

Key Responsibilities

• Perform FPGA implementation of a post-quantum secure RISC-V processor core.
• Perform functional verification and test of the RISC-V based platform including accelerators for post-quantum secure cryptography.
• Research the design-time verification of hardware-security features such as side-channel analysis resistance considering the use-case of a post-quantum secure RISC-V processor platform.
• Collaborate with experts in IC design and security to enable leading-edge IC design.
• Write scientific manuscripts, contribute to project reports, and present findings at international conferences and stakeholder meetings.
• Proven expertise in hardware security and/or FPGA design and/or design verification.
• Excellent written and verbal communication skills in English, with the ability to communicate complex analytical results to multidisciplinary teams.
• Demonstrated ability to work independently and collaboratively in a fast-paced, international research environment.

Qualification Requirements

• Bachelor’s degree in electrical engineering or related fields with at least two years of experience in FPGA design, verification, or testing, or
• Master’s degree in electrical engineering or related fields with focus on hardware security, digital or analog design, or
• PhD degree related to hardware security, embedded security, embedded systems or circuit design.
• Candidates expecting to fulfil one of these requirements within 2 months after application are welcome to apply.
• Publications in the domain of FPGA design or verification at premier conferences and in premier journals are considered a strong asset.

What we offer

• A collaborative and inclusive world-class research environment.
• Opportunities for scientific leadership for research fellows.
• The opportunity to pursue a PhD (awarded by the Technical University of Munich) for research associates with a master’s degree.
• Opportunities for professional development.
• Engagement with a leading international team addressing challenges in IC design for post-quantum security.

Department

Department QUASAR

Contract Duration

Contract Duration Fixed term contract

Closing Date