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TUM CREATE LIMITED, a joint research platform of TUM at the Singapore Campus, is seeking researchers in Secure Hardware Design to advance TRNG and PUF solutions for an open-source post-quantum RISC-V processor. You will develop novel key-storage and authentication methods and integrate analog components in IC design teams.
The role is a fixed-term contract until March 2029. You will collaborate with international experts, publish findings, and present at conferences, contributing to a
TUMCREATE is a multidisciplinary research platform of the Technical University Munich (TUM) at the Singapore Campus for Research Excellence and Technological Enterprise (CREATE). We are joining forces with universities, public agencies, and industry for the advancement of future technologies.
Our research program on post-quantum Security, ‘QUASAR - QUANTUM SECURITY AND RESILIENCE FOR EMERGING TECHNOLOGIES’ funded by Singapore’s National Research Foundation (NRF), is a collaborative effort between the Technical University Munich (TUM), Fraunhofer Singapore, Nanyang Technological University (NTU), the National University of Singapore (NUS). At TUMCREATE, we will focus on developing an open and verifiable Quantum safe RISC-V processor platform as a foundation for the QUASAR program.
As part of the QUASAR team, you will work alongside renowned scientists in Integrated Circuit (IC) design, security,and quantum technologies.
Please visit www.tum-create.edu.sg for more information about TUMCREATE.
Research Fellow (PhD holder) / Research Associate (Master's degree holder; PhD candidate) / Research Engineer (Hardware-Intrinsic Security)
We are seeking a highly motivated and skilled researchers in Secure Hardware Design. You will research leading-edge True Random Number Generator (TRNG) and Physical Unclonable Function (PUF) solutions in the context of post quantum security applications, especially dedicated to a RISC-V processors. You will investigate and provide advanced designs and algorithms for PUF-based key-storage and authentication solutions and accelerators to provide randomness to an open-source post-quantum secure system.You will be responsible for the physical design and the integration of analog components in a team for IC design of an RISC-V processor.
This is a fixed term contract until March 2029 when applicable.