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GLOBALFOUNDRIES SINGAPORE PTE. LTD. is seeking a Senior Member of Technical Staff to serve as the technical authority for advanced RRAM technology.
You will lead end-to-end across device physics, stack engineering, and macro architecture, and translate research concepts into manufacturable memory solutions for embedded and standalone applications. You will partner with circuit and SoC teams, define roadmaps, mentor engineers, and represent RRAM in executive reviews and customer engagements.
Introduction: We are seeking a Senior Member of Technical Staff to serve as the technical authority for advanced RRAM (Resistive RAM) technology development. This role provides end‑to‑end leadership across RRAM device physics, stack engineering, bitcell and macro architecture, and test methodology optimization. The SMTS will define the long‑term technical roadmap for RRAM platforms and ensure successful translation from research concepts to manufacturable, high‑quality memory solutions for embedded and standalone applications. This position requires deep hands‑on expertise combined with system‑level thinking, strong technical judgment, and the ability to influence cross‑functional teams and senior stakeholders.
Define and own RRAM bitcell and macro architecture, including scaling strategies, array topology, sensing schemes, redundancy, and robustness margins.
Lead architecture trade‑offs balancing performance, power, area, variability, endurance, and retention for product‑level requirements.
Partner with circuit and SoC (design) teams to ensure seamless macro integration into customer designs.
Set technical direction for RRAM stack layer optimization, including material selection, interface control, thickness scaling, and variability reduction.
Drive deep understanding of RRAM switching physics, forming mechanisms, defect engineering, and reliability failure modes.
Work closely with process integration teams to ensure compatibility with advanced BEOL/FEOL flows and cost‑effective manufacturing.
Own definition and optimization of electrical test conditions, including forming, set/reset algorithms, read methodologies, and stress conditions.
Define the associated RRAM ET parameters target and specification.
Lead comprehensive DC/AC characterization, array‑level analysis, and qualification strategies to meet product and customer reliability requirements.
Drive silicon learning, root‑cause analysis, and yield/reliability improvement based on statistical data and failure analysis.
Act as the primary technical decision‑maker for RRAM programs, resolving complex cross‑disciplinary trade‑offs.
Guide multiple project teams from early concept through silicon validation, product qualification, and technology transfer.
Represent RRAM technology in executive reviews, customer engagements, and technical forums.
Mentor and junior engineers, building long‑term RRAM technical depth within the organization.
Establish best practices, design guidelines, and institutional knowledge for scalable RRAM development.