PMTS - RRAM Technology and Architecture

GlobalFoundries

Singapore

On-site

SGD 180,000 - 240,000

Full time

13 days ago

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Job summary

GlobalFoundries seeks a Senior Member of Technical Staff to lead end-to-end RRAM technology development, from device physics to macro architecture and test methodology optimization. This role shapes the long‑term technical roadmap and ensures manufacturable, high‑quality memory solutions for embedded and standalone applications.

The SMTS will work with cross‑functional teams and senior stakeholders, driving reliability, process integration, and product qualification across BEOL/FEOL flows.

Qualifications

  • 15+ years of RRAM or emerging NVM development experience.
  • Recognized expert in RRAM device physics, stack engineering, bitcell/macro design, and reliability characterization.
  • Proven track record of driving RRAM technologies into silicon platforms or products.
  • Strong leadership, communication, and cross-functional influence skills.

Responsibilities

  • Define and own RRAM bitcell and macro architecture, including scaling strategies and sensing schemes.
  • Lead architecture trade-offs balancing performance, power, area, variability, endurance, and retention.
  • Partner with circuit and SoC teams to ensure seamless macro integration into customer designs.
  • Set technical direction for RRAM stack layer optimization and variability reduction.
  • Drive understanding of RRAM switching physics, forming mechanisms, and reliability failure modes.
  • Collaborate with process integration to ensure BEOL/FEOL compatibility and cost-effective manufacturing.
  • Own definition and optimization of electrical test conditions and stress testing.
  • Lead DC/AC characterization, array-level analysis, and qualification strategies for reliability.
  • Mentor engineers and establish best practices and institutional knowledge for RRAM development.
  • Represent RRAM technology in executive reviews, customer engagements, and technical forums.

Skills

RRAM device physics
Stack engineering
Bitcell design
Macro design
Reliability characterization

Education

PhD or MS in Electrical Engineering, Materials Science, Physics, or related field

Job description

Introduction:
We are seeking a Senior Member of Technical Staff to serve as the technical authority for advanced RRAM (Resistive RAM) technology development. This role provides end‑to‑end leadership across RRAM device physics, stack engineering,bitcelland macro architecture, and test methodology optimization. The SMTS will define the long‑term technical roadmap for RRAM platforms and ensure successful translation from research concepts to manufacturable, high-quality memory solutions for embedded and standalone applications.

This position requires deep hands‑on expertise combined with system‑level thinking, strong technical judgment, and the ability to influence cross‑functional teams and senior stakeholders.

Key Responsibilities

RRAM Architecture and Design Leadership

  • Define and own RRAMbitcelland macro architecture, including scaling strategies, array topology, sensing schemes, redundancy, and robustness margins.

  • Lead architecture trade‑offs balancing performance, power, area, variability, endurance, and retention for product‑level requirements.

  • Partner with circuit and SoC(design)teams to ensure seamless macro integration into customer designs.

RRAM Stack and Device Technology

  • Set technical direction for RRAM stack layer optimization, including material selection, interface control, thickness scaling, and variability reduction.

  • Drive deep understanding of RRAM switching physics, forming mechanisms, defect engineering, and reliability failure modes.

  • Work closely with process integration teams to ensure compatibility with advanced BEOL/FEOL flows and cost‑effective manufacturing.

Test, Characterization, and Reliability

  • Own definition and optimization of electrical test conditions, including forming, set/reset algorithms,readmethodologies, and stress conditions.

  • Define the associated RRAM ET parameters target and specification.

  • Lead comprehensive DC/AC characterization, array‑level analysis, and qualification strategies to meet product and customer reliability requirements.

  • Drive silicon learning, root‑cause analysis, and yield/reliability improvement based on statistical data and failure analysis.

Program and Technical Leadership

  • Act as the primary technical decision‑maker for RRAM programs, resolving complex cross‑disciplinary trade‑offs.

  • Guide multiple project teams from early concept through silicon validation, product qualification, and technology transfer.

  • Represent RRAM technology in executive reviews, customer engagements, and technical forums.

Talent and Knowledge Development

  • Mentor and junior engineers, building long‑term RRAM technical depth within the organization.

  • Establish best practices, design guidelines, and institutional knowledge for scalable RRAM development.

Required Qualifications
  • PhD or MS in Electrical Engineering, Materials Science, Physics, or related field with 15+ years of RRAM or emerging NVM development experience.

  • Recognized expert in RRAM device physics, stack engineering,bitcell/macro design, and reliability characterization.

  • Proven track record of driving RRAM technologies into silicon platforms or products.

  • Strong leadership, communication, and cross‑functional influence skills.

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