Foundation IP Design Engineer

AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED; Singapore; On-site; SGD 70,000 - 130,000; Full time

Job summary

Broadcom Inc. in Singapore is seeking a Memory Design Engineer to join its elite memory team within the Central Engineering Group.

You will develop memory compilers and custom macros using cutting-edge process technology and collaborate across design, verification, and test teams. The role requires hands-on experience with memory architectures, transistor-level design, and scripting to automate characterization, simulation, and verification flows.

Qualifications

• BS in Electrical Engineering with 2+ years of related experience.

Responsibilities

• Analyze memory architectures to optimize design choices.
• Design and build memory blocks at gate or transistor level.
• Simulate and verify designs with transistor-level tools.
• Develop automation scripts to streamline characterization, simulation, and verification.

Skills

Memory compilers

Digital circuits

Scripting & automation

Memory modeling

Education

BS in Electrical Engineering

Tools

Circuit simulators

EDA tools

Job description

Company Overview

Broadcom Inc. is a global technology leader designing and supplying semiconductor and infrastructure software solutions for data center, networking, software, broadband, wireless, storage, and industrial markets. Learn more at www.broadcom.com.

Job Summary

Join our elite memory team within the Central Engineering Group to develop advanced memory compilers and custom macros using cutting-edge process technology.

Responsibilities

• Analyze various memory architectures to evaluate tradeoffs and optimize design choices
• Design and build memory or circuit blocks at gate or transistor level to meet performance targets
• Simulate and analyze circuit designs using transistor-level simulators to validate functionality
• Extract layout data and perform post-layout simulations and verification to ensure design accuracy
• Floorplan physical implementation and integrate leafcell layouts to construct physical macros
• Integrate characterization flows to extract timing and power metrics for design evaluation
• Develop automation scripts to streamline characterization, simulation, and verification processes
• Specify and verify behavioral and physical memory models to ensure design compliance
• Document design specifications, behavioral descriptions, and timing diagrams for clear communication
• Specify silicon test plans and correlate silicon results with simulation data to validate designs
• Assist in debugging silicon issues to improve product quality and reliability

Required competencies and certifications

• BS in Electrical Engineering with 2+ years of related experience

Preferred competencies and qualifications

• Knowledge in developing memory compilers or custom digital circuits including SRAMs, Register-files, Multi-ports, ROM, etc.
• Understanding of transistor-level circuit behavior and device physics to support design accuracy
• Understanding of signal integrity, EM/IR, and reliability analysis to ensure robust designs
• Understanding of memory behavioral and physical models for effective specification and verification
• Understanding of DFT schemes and chip-level integration to support testability and manufacturability
• Familiarity with test setups, silicon testing, and debugging to assist in product validation
• Proficiency in running simulators, writing automation scripts, and using design tools effectively
• Strong communication, interpersonal, and leadership skills to collaborate and lead within teams
• Self-motivated, driven, and capable of managing multiple tasks efficiently