I/O Design Engineer

Broadcom Singapore Pte Ltd; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Broadcom Singapore Pte Ltd is seeking an experienced I/O Design Engineer with a strong background in analog and mixed-signal IC design. You will contribute to design and verification of IP and I/Os, including AI programs on advanced nodes, in a collaborative team environment.

You will design CMOS I/O, run simulations, verify measurements, and work with layout to ensure physical design integrity while building Verilog and IBIS models and creating comprehensive documentation for integration and

Qualifications

• MS or PhD in Electrical Engineering.
• 6+ years of I/O or analog circuit design experience.
• Proficient with Cadence Virtuoso for schematic/layout and SPICE/Spectre simulations.
• Familiar with I/O protocols including GPIO, I2C, I3C, eMMC, RGMII and SPMI.

Responsibilities

• Design CMOS I/O, high-precision bandgap references, op-amps, comparators and POR circuits.
• Run simulations to validate AC/DC performance, signal integrity, jitter and power.
• Perform transistor reliability and EMIR analysis.
• Work closely with layout teams to oversee physical design and verification.
• Build Verilog, Synopsys Liberty and IBIS models.
• Create and maintain detailed technical documentation, including datasheets, application notes and integration guides.
• Support chip-level integration and silicon bring-up in test chips and customer products.

Skills

I/O Design

Analog/Mixed-Signal

Circuit Simulation

Documentation

Modeling

Education

MS or PhD in Electrical Engineering

Tools

Cadence Virtuoso

SPICE/Spectre

Verilog

Synopsys Liberty

IBIS models

Job description

Job Description:

Role Overview

Broadcom’s Central Engineering Group is seeking an I/O Design Engineer with experience in analog and mixed-signal IC design. The candidate will contribute to the design and verification of a broad range of IP and I/Os, including leading-edge AI programs on advanced nodes. Joining a world-class team of engineers with a highly collaborative culture, the role offers opportunities for growth and development.

Responsibilities

• Design of CMOS I/O, high-precision bandgap references, op-amps, comparators and power-on-reset circuits.
• Run simulations to validate AC/DC performance, signal integrity, jitter and power.
• Perform transistor reliability and EMIR analysis.
• Work closely with layout teams to oversee physical design and verification.
• Build Verilog, Synopsys Liberty and IBIS models.
• Create and maintain detailed technical documentation, including datasheets, application notes and integration guides.
• Support chip-level integration and silicon bring-up in test chips and customer products.

Technical Skills and Requirements

• MS or PhD in Electrical Engineering.
• 6+ years of I/O or analog circuit design experience.
• Deep proficiency in Cadence Virtuoso Schematic/Layout capture and SPICE/Spectre circuit simulation.
• Solid foundation in I/O protocols including GPIO, I2C, I3C, eMMC, RGMII and SPMI.
• Familiarity with ESD, EMI and Signal Integrity.
• Experience with advanced CMOS FinFET and GAA process nodes, including features, technology limitations and PPA tradeoffs.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.