First-Silicon Test Architect for NPI & ATE

ARETE RESOURCES PTE. LTD.; Singapore; Presencial; SGD 120.000 - 180.000; Jornada completa

Descripción de la vacante

ARETE RESOURCES PTE. LTD. is seeking a dedicated Test Development Engineer to lead the definition, architecture, and execution of test solutions for NPI silicon programs.

You will bridge design specifications to robust ATE test programs and accelerate time-to-market by unifying characterization and manufacturing test coverage early in the design cycle. The role requires hands-on bring-up of first-pass silicon, strong programming in C++, Python, and Perl, and collaboration with IP owners and test

Formación

• Experience developing ATE test programs on Advantest SmartScale (PS1600) or ExaScale (PS5000) platforms.
• Advanced programming skills in C++, Python, and Perl.
• Deep understanding of silicon physics, ESD, latch-up, and testing at advanced nodes (1.4nm/2nm/3nm).
• Strong grasp of high-speed electronics, transmission line theory, power delivery and test hardware design.
• NPI lifecycle experience from tape-out to qualification and high-volume transfer.

Responsabilidades

• Lead test program architecture from pre-silicon to mass production.
• Drive first silicon bring-up and debug between ATE platforms and silicon.
• Develop, implement, and validate ATE test programs for next-generation chips.
• Collaborate with PCB and probe card designers to optimize test hardware for high-speed signals.
• Incorporate DFT features (Scan, MBIST, Boundary Scan) into the test flow.
• Perform PVT characterization to establish product guard-bands.
• Serve as the technical lead to IP owners, DFT engineers, and test partners.

Conocimientos

ATE test programs

C++

Python

Perl

Test automation

High-speed electronics

Herramientas

Advantest PS1600

Advantest PS5000

Descripción del empleo

ARETE RESOURCES PTE. LTD. is seeking a dedicated Test Development Engineer to lead the definition, architecture, and execution of test solutions for NPI silicon programs.

You will bridge design specifications to robust ATE test programs and accelerate time-to-market by unifying characterization and manufacturing test coverage early in the design cycle. The role requires hands-on bring-up of first-pass silicon, strong programming in C++, Python, and Perl, and collaboration with IP owners and test