Campus Singapore-ASIC Design Engineer

Canaan Inc.; Singapore; On-site; SGD 90,000 - 160,000; Full time

Job summary

Canaan Inc. is seeking a design engineer in Singapore to design AI chip SoC microarchitecture and accelerator units, focusing on performance, timing, area, and power optimizations. You will analyze architectures and contribute to novel designs to push AI chip efficiency.

The role welcomes fresh graduates and emphasizes rapid learning and collaboration across cross-functional teams, with opportunities in state-of-the-art ASIC design and advanced-node processes.

Qualifications

• Bachelor’s degree required in Electrical & Electronic Engineering, Computer Science or equivalent.
• Knowledgeable in computer architecture including AI accelerator, CPU, NoC, memory hierarchy.
• Familiar with hardware development using HDLs.
• Fresh graduates encouraged to apply, strong learning ability and collaboration.

Responsibilities

• Design the microarchitecture of AI chip SoC and the subsystems including AI accelerator units, NoC/interconnect, etc
• Optimize performance, timing, area, and power of the designs
• Perform critical analysis and propose novel chip architectures for performance, power, and area improvement

Skills

AI accelerator

HDL expertise

NoC interconnect

Team collaboration

Education

Bachelor's degree in Electrical & Electronic Engineering, Computer Science or equivalent

Tools

Verilog/SystemVerilog

FPGA development

Job description

Design and implement leading AI inference chip

Responsibilities:

• Design the microarchitecture of AI chip SoC and the subsystems including AI accelerator units, NoC/interconnect, etc
• Optimize performance, timing, area, and power of the designs
• Perform critical analysis and propose novel chip architectures for performance, power, and area improvement

Qualification:

• Bachelor’s degree and above in Electrical & Electronic Engineering, Computer Science or equivalent
• Knowledgeable in computer architecture, such as AI Accelerator, CPU, network-on-chip, memory hierarchy
• Familiar with hardware module development using HDLs
• Strong learning capability, good communication and collaboration skills
• Fresh graduates are also encouraged to apply

Preferred Qualifications:

• Course or personal projects involving Verilog, SystemVerilog, FPGA, or processor design
• Exposure to hardware verification, synthesis, or timing analysis

Growth opportunities:

• State of art AI chip architecture design and implementation
• Extensive exposure to advanced-node ASIC design