A technology company in Singapore seeks a Production Development Engineer to develop and execute test solutions for integrated voltage regulators. You will collaborate with design and validation teams to ensure reliable product performance. Ideal candidates have over 7 years in the semiconductor industry, strong analytical and problem-solving skills, and hands-on experience with ATE platforms like Teradyne and Advantest. This role offers an excellent opportunity for technical leadership in an innovative environment.
Qualifications
7+ years of experience in the semiconductor industry.
Hands-on expertise in integrated voltage regulator testing.
Proficient in developing and debugging test programs.
Responsibilities
Develop and execute test solutions for IVRs used in advanced SoC applications.
Lead engineering efforts in silicon characterization and analysis.
Collaborate with design and systems teams to define test specifications.
Skills
Understanding of product development ecosystem
Strong analytical skills
Leadership skills
Problem-solving skills
Data extraction and visualization using statistical tools
Proficient in Python
Proficient in SQL
Tools
Teradyne
Advantest ATE platforms
Excel
Power BI
JMP
EDA tools
Job description
(It's a good opportunity to broad your career as a Production Development Engineer in Singapore!🚀)
Looking for someone with understanding of product development ecosystem.
Having a strong background in Integrated Voltage Regulator (IVR) testing and characterization, with hands-on expertise in Teradyne/Advantest ATE platforms.
Strong technical, analytical, leadership and problem-solving skills.
You will focus on developing and executing test solutions for IVRs used in advanced SoC and power management applications.
You will work closely with design, product, and validation teams to ensure robust test coverage, yield optimization, and reliable product performance.
Lead engineering efforts in silicon characterization and analysis to define products that meet customer requirements, yield, and cost targets.
Provide technical leadership across PEO teams, aligning design feedback, customer requirements, and product goals.
Represent PEO in design discussions, influencing decisions that significantly impact final product outcomes.
Conduct gate reviews for test, cost, and quality at key development milestones.
Drive timely resolution of customer-reported issues with quality and support teams.
Develop ATE test programs and hardware (e.g., load boards, probe cards) for validation, characterization, and production testing of IVRs.
Utilize platforms such as Teradyne (UltraFlex, J750) and Advantest (V93000, T2000) to implement and debug analog/mixed-signal test routines.
Support test development from pre-silicon through high-volume manufacturing, including PVT characterization and detailed reporting.
Collaborate with design and systems teams to define test specifications and translate design intent into executable test plans.
Automate datacollection and analysis using tools like Python, MATLAB, or JMP.
Lead root-cause analysis of silicon issues using both ATE and bench-level tools.
Drive initiatives for test time reduction, yield enhancement, and cost optimization.
7+ years of experience in semiconductor industry, with a strong foundation in analog/mixed-signal IC testing and ATE development.
Skilled in data extraction, manipulation, and visualization using statistical tools such as correlation analysis, predictive modeling, contrast analysis, and machine learning.
Proficient in wafer, final test (FT), and system-level test (SLT) methodologies and equipment.
Solid understanding of Design of Experiments (DOE), failure analysis, and RMA processes.
Background in solid-state physics, computer architecture, and both digital and analog design.
Experienced in Python for data analysis, SQL for database queries, and scripting in C, C++, Java, Ruby, and Perl.
Strong command of Excel, JMP, Yield Explorer, SAS, Power BI, and other EDA tools.
Comfortable working across Windows and Unix/Linux environments.
Manage multiple projects under tight deadlines with strong communication and organizational skills.
Hands-on experience with on-die and integrated voltage regulators in a dvanced CMOS nodes.
Familiar with high-volume manufacturing, test correlation between ATE and bench, and reliability qualification (ESD/Latch-up, HTOL).
Knowledgeable in test hardware design and debugging (probe cards, load boards), and test cost optimization techniques.
Proficient in developing/debugging test programs on Teradyne and Advantest ATE platforms.
Strong grasp of power management circuits including buck/boost converters, LDOs, and SVI3/I2C/I3C protocols.
Experienced with lab instrumentation such as oscilloscopes, SMUs, electronic loads, and network analyzers.
Skilled in silicon bring-up, PVT characterization, and yield analysis with robust troubleshooting capabilities