UST in Singapore seeks a talented Validation Engineer to conduct root cause analysis, validate semiconductor products, and mentor junior engineers. Responsibilities include creating documentation, performing escape analysis, and executing test plans. Ideal candidates possess strong bug advocacy skills, experience with testing tools like ATE, and a solid understanding of semiconductor architectures. The role emphasizes collaboration and effective communication with clients and team members.
Qualifications
Ability to estimate time required for both own work and junior engineers.
Proven skills in validation and testing methodologies.
Strong written and verbal communication skills.
Responsibilities
Conduct root cause analysis and bug advocacy.
Perform escape analysis and validate products.
Create documentation and reporting templates.
Skills
Bug advocacy
Report consolidation
Automation scripting
Windows OS troubleshooting
BIOS drivers knowledge
Analytical skills
Teamwork
Communication skills
Tools
Statistical tools (e.g., SQL, JMP)
ATE (Advantest 93k)
Job description
Role Description
Role Proficiency: Conducts root cause analysis and bug advocacy in Semiconductor Products; tracking activities to closure with very minimal supervision.
Outcomes
Conducts validation and root cause analysis
Perform escape analysis
Isolate/packetize the failures to correct components
Attend customer meeting and communicate effectively on the requirements and results.
Locate the product failures and report it in test repository and bug tracker
Learn technology business domain system domain individually and as recommended by the project/account
Complete the certifications for the role (like ISTQB UST GAMMA certifications)
Execute test cases across the functionalities
Measures of Outcomes
Number of showstoppers and critical bugs found
Adherence to schedule / timelines
Number of defects post delivery
Number of non-compliance issues
Reduction of recurrence of known defects by SLA
SLA in turnaround of production bugs
Defined productivity standards for project
Completion of all mandatory training requirements
Outputs Expected
Perform task deliverables with quality and targeting completion timeframe.
Estimate
Estimate time effort and resource dependence for one's own work and for others’ work.
Document
Create documentation for own work
Create test reporting templates BKMs and knowledge sharing documents for team
Status Reporting
Report status of tasks assigned
Compliance with validation standards and process
Mentoring
Host classroom training sessions for the junior validation engineers
Set FAST goals and provide feedback to FAST goals of mentees
Skill Examples
Should possess good bug advocacy skills
Should have good report consolidation and presentation skills as well as diplomacy
Should have automation scripting skills
Should be able to do severity and priority identification of sightings raised
Working with Windows OS flavours and installation
Working with BIOS drivers and various display protocols
Ability to estimate effort time required for own work and for the junior engineers
Ability to perform and evaluate test in the customer or target environment
Work in a team environment
Good written and verbal communication abilities
Possess good analytical skills
Knowledge Examples
Excellent domain and product knowledge
Good knowledge of CPU/ GPU architecture
Awareness of Benchmarking tools and their functionalities
Possesses very good knowledge of products
Additional Comments
1 ATE Test Engineer
Plan and execute pattern validation plans based on schedule
Plan and execute on charz plans based on schedule
Support HTOL and Pkg qualification activities based on schedule
Provide DIB boards design guidelines based on schedule
Work with AMD Pkg and HWI team for HW readiness based on schedule
Work with AMD design team for content readiness based on schedule
ATE test program development, validation and release
Plan and execute sample deliveries plan based on schedule
Plan and execute yield attainment plans based on schedule
Plan and execute test time attainment plans based on schedule
Align testpoints and define Vid bucketing based on schedule
Work with Quality to support RMA debug to meet cycle time with the customers and drive quality improvements to meet targeted DPPM
Qualifying OSAT for manufacturing testing
Manufacturing, and post-manufacturing product life cycle support 3.2 Product Engineering
Familiarity with Semiconductor (CMOS) Testing
Familiarity with Personal Computer Systems (basic Motherboard configuration, Windows OS, base BIOS settings)
Familiarity with ATE (Advantest 93k) operation, debug and data collection features.
Data Analysis know-how, base ability with statistical tools (e.g. SQL, JMP, etc.)
Familiarity with DFT concepts (ATPG, BIST, etc)
Have experience on yield engineering and driving yield margin
Work with AMD system teams to align on Vid allocation methodology and ensure product bounding box is met