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Astera Labs seeks a motivated Analog Mixed-Signal Layout Intern to assist in the design and layout of high-performance analog and mixed-signal IP blocks. You will work with experienced engineers to translate schematic designs into silicon, gaining hands-on experience with advanced technology nodes and CAD tools.
Responsibilities include LVS, DRC, PEX checks, floor planning, placement, routing, and matching for analog blocks, while collaborating to optimize performance and reliability.
Astera Labs seeks a motivated Analog Mixed-Signal Layout Intern to assist in the design and layout of high-performance analog and mixed-signal IP blocks. You will work with experienced engineers to translate schematic designs into silicon, gaining hands-on experience with advanced technology nodes and CAD tools.
Responsibilities include LVS, DRC, PEX checks, floor planning, placement, routing, and matching for analog blocks, while collaborating to optimize performance and reliability.