AMS Layout Intern: High-Speed Analog & Mixed‑Signal Design

Astera Labs; Singapore; On-site; SGD 13,000 - 20,000; Part time

Job summary

Astera Labs in Singapore is seeking a motivated Analog Mixed-Signal Layout Intern to assist in designing and laying out high-performance IP blocks. You will work with experienced layout and circuit design engineers to translate schematic designs into silicon, gaining hands-on experience with advanced technology nodes and CAD tools.

The role offers exposure to industry-standard AMS design flows, hands-on experience with real design projects leading to tape-out, and mentorship from seasoned layout

Qualifications

• Pursuing Bachelor's or Master's in Electrical or Computer Engineering or related field.
• Basic understanding of analog/mixed-signal IC design concepts.
• Familiar with Cadence Virtuoso, Synopsys, or Mentor Graphics.
• Basic understanding of matching techniques, layout symmetry, and common centroid structures.
• Eagerness to learn advanced layout methodologies for high-speed, low-noise analog design.

Responsibilities

• Assist in layout design of analog and mixed-signal circuits such as current mirrors, differential pairs, op-amps, bandgaps, and comparators.
• Perform LVS, DRC, and parasitic extraction to ensure design quality and manufacturability.
• Support floor planning, placement, routing, and matching for analog blocks following layout best practices (symmetry, shielding, guard rings).
• Work with circuit designers to optimize layout for performance, area, and reliability (minimize mismatch, noise coupling, IR drop).
• Document layout work and contribute to layout review checklists and verification reports.

Skills

Analog layout concepts

Analytical skills

Problem solving

Layout symmetry

High-speed design awareness

Education

Bachelor’s or Master’s in EE/CE or related

Tools

Cadence Virtuoso

Synopsys

Mentor Graphics

Job description

Astera Labs in Singapore is seeking a motivated Analog Mixed-Signal Layout Intern to assist in designing and laying out high-performance IP blocks. You will work with experienced layout and circuit design engineers to translate schematic designs into silicon, gaining hands-on experience with advanced technology nodes and CAD tools.

The role offers exposure to industry-standard AMS design flows, hands-on experience with real design projects leading to tape-out, and mentorship from seasoned layout