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ByteDance seeks an experienced analog/mixed-signal engineer to lead IP design for high-performance SoCs. The role emphasizes PLL, DC/DC, LDO design and layout supervision within a data-center oriented CPU IP team.
Strong modeling and simulation skills are required, along with a PhD or MS in electrical engineering and several years of hands-on experience in device physics and CPU-related analog IPs. The team pursues high-reliability, energy-efficient silicon in advanced nodes.
Team Introduction
The Server Silicon Design and Application Team drives cutting-edge innovation by designing, developing, and producing CPUs for data center servers. With a combination of engineers, researchers, and specialists, the team focuses on creating chips that are high-performance, energy-efficient, and highly reliable, powering a wide range of electronic devices and systems.