AI Hardware Architect: Low-Precision & Sparse Computing

PERSOL SINGAPORE PTE. LTD.; Singapore; On-site; SGD 180,000 - 240,000; Full time

Job summary

PERSOL SINGAPORE PTE. LTD. seeks an Advanced Engineer for High-Efficiency AI Computing to shape next-generation AI hardware.

You will bridge algorithmic innovation with silicon design, advancing low-precision and sparse computing to optimize energy efficiency and performance for large-scale AI models. You will lead kernel architecture, hardware-software co-design, and collaboration with IC design teams to deliver specs, benchmarks, and patent ideas, while maintaining a strong publication record

Qualifications

• PhD in a relevant field with strong publication record
• Deep knowledge of GPU/NPU architecture and low-precision computing
• Proven impact in inference optimization for large AI models
• Experience in system-level design for AI accelerators

Responsibilities

• Spearhead research into optimal quantization methodologies for low-precision data formats and expand the low-precision computing ecosystem.
• Architect and deploy high-performance kernels for low-precision and sparse computing tailored to AI accelerators.
• Identify bottlenecks and drive microarchitectural evolution to boost energy efficiency and throughput.
• Collaborate with IC design teams to deliver technical specifications, benchmark reports, and patent proposals.

Skills

Computer architecture

GPU microarchitecture

Quantization

Sparsity

Kernel development

LLM inference optimization

Cross-functional collaboration

Education

Ph.D. in Computer Science, Electronic Engineering, Automation, or related field

Job description

PERSOL SINGAPORE PTE. LTD. seeks an Advanced Engineer for High-Efficiency AI Computing to shape next-generation AI hardware.

You will bridge algorithmic innovation with silicon design, advancing low-precision and sparse computing to optimize energy efficiency and performance for large-scale AI models. You will lead kernel architecture, hardware-software co-design, and collaboration with IC design teams to deliver specs, benchmarks, and patent ideas, while maintaining a strong publication record