Advanced Engineer (High-Efficiency AI Computing)

PERSOL SINGAPORE PTE. LTD.; Singapore; On-site; SGD 180,000 - 240,000; Full time

Job summary

PERSOL SINGAPORE PTE. LTD. seeks an Advanced Engineer for High-Efficiency AI Computing to shape next-generation AI hardware.

You will bridge algorithmic innovation with silicon design, advancing low-precision and sparse computing to optimize energy efficiency and performance for large-scale AI models. You will lead kernel architecture, hardware-software co-design, and collaboration with IC design teams to deliver specs, benchmarks, and patent ideas, while maintaining a strong publication record

Qualifications

• PhD in a relevant field with strong publication record
• Deep knowledge of GPU/NPU architecture and low-precision computing
• Proven impact in inference optimization for large AI models
• Experience in system-level design for AI accelerators

Responsibilities

• Spearhead research into optimal quantization methodologies for low-precision data formats and expand the low-precision computing ecosystem.
• Architect and deploy high-performance kernels for low-precision and sparse computing tailored to AI accelerators.
• Identify bottlenecks and drive microarchitectural evolution to boost energy efficiency and throughput.
• Collaborate with IC design teams to deliver technical specifications, benchmark reports, and patent proposals.

Skills

Computer architecture

GPU microarchitecture

Quantization

Sparsity

Kernel development

LLM inference optimization

Cross-functional collaboration

Education

Ph.D. in Computer Science, Electronic Engineering, Automation, or related field

Job description

Role Overview:

As an Advanced Engineer for High-Efficiency AI Computing, you will be at the forefront of shaping the next generation of AI hardware. Bridging the gap between algorithmic innovation and silicon design, you will play a critical role in pushing the boundaries of low-precision and sparse computing. Your work will directly influence the microarchitectural evolution of our flagship AI accelerators, driving massive improvements in energy efficiency and computational performance for large-scale AI models.

Key Responsibilities:

• Algorithmic Innovation: Spearhead research into optimal quantization methodologies for advanced low-precision data formats, driving the strategic adoption and expansion of our low-precision computing ecosystem to secure a competitive edge in numerical computing.
• Kernel Architecture: Architect and deploy high-performance, highly scalable kernels for low-precision and sparse computing (e.g., GEMM, FlashAttention), explicitly tailored to maximize the microarchitectural strengths of our in-house AI accelerators.

• Hardware-Software Co-Design: Identify systemic performance bottlenecks and drive the microarchitectural evolution of next-generation AI chips, significantly enhancing energy efficiency and throughput.
• Partner closely with IC design teams to ensure to deliver comprehensive technical specifications, rigorous benchmark reports, and high-value patent proposals.

Required Skills & Qualifications:

• Education: Ph.D. in Computer Science, Electronic Engineering, Automation, or a highly related technical field.
• Technical Expertise: Deep foundational knowledge in computer architecture, specifically regarding GPU/NPU microarchitecture implementation.
• Domain Knowledge: Profound, demonstrable expertise in algorithm research focused on low-precision quantization and sparsity.
• Proven Impact: A strong track record in inference optimization for Large Language Models (LLMs) or multi-modal models, coupled with hands-on high-performance kernel development.
• System-Level Design: Concrete experience in system-level architectural design for high-performance AI inference accelerators.
• Academic Excellence: A robust publication record in tier-1 architecture and AI conferences (e.g., ISCA, MICRO, HPCA, ASPLOS, NeurIPS, CVPR).
• Professional Attributes: Exceptional cross-functional collaboration and communication skills, with the ability to build consensus across algorithm, silicon design, software, and testing teams

We regret to inform that only shortlisted candidates will be notified.