Senior CHI Protocol Verification Engineer - Hybrid/Remote

Swediumglobal; Stockholms kommun; Hybrid; SEK 652,670 - 924,616; Full time

Job summary

Swediumglobal is seeking a Senior Design Verification Engineer with expertise in CHI protocol verification for a significant semiconductor development project. The ideal candidate should have a strong background in SystemVerilog and UVM, and experience in designing complex coherent fabrics for high-performance SoCs.

Your responsibilities will include executing verification plans, debugging issues, and contributing to the improvement of verification methodologies.

This role offers a hybrid work model across Europe.

Qualifications

• 6+ years of Design Verification experience.
• Strong expertise in protocol verification and memory subsystems.
• Experience with constrained-random verification methodologies.

Responsibilities

• Develop and execute verification plans for CHI-based subsystems.
• Build and maintain reusable SystemVerilog/UVM verification environments.
• Debug RTL and simulation issues.

Skills

SystemVerilog

UVM

Assertions (SVA)

Functional Coverage

CHI protocol verification

Python

Perl

Shell scripting

Education

Bachelor's or Master's degree in Electronics, Computer Engineering, or related discipline

Tools

VCS

Xcelium

Questa

Job description

Swediumglobal is seeking a Senior Design Verification Engineer with expertise in CHI protocol verification for a significant semiconductor development project. The ideal candidate should have a strong background in SystemVerilog and UVM, and experience in designing complex coherent fabrics for high-performance SoCs.

Your responsibilities will include executing verification plans, debugging issues, and contributing to the improvement of verification methodologies.

This role offers a hybrid work model across Europe.