Forward Deployed Engineer (FDE)

AMD

Medina

On-site

SAR 260,000 - 460,000

Full time

5 days ago
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Job summary

AMD is seeking a highly skilled Member of Technical Staff to join the Forward Deployed Engineering team. You will work directly with strategic partners to optimize and deploy GenAI inference workloads on AMD Instinct GPUs, bridging AI models and hardware for maximum performance.

In this customer-facing role, you will optimize pipelines, develop low-level kernels, and contribute to open-source frameworks while leveraging AI-assisted tooling to accelerate delivery and ensure accuracy and

Qualifications

  • BS/MS/PhD in Computer Science or Electrical Engineering or a related field.
  • 8+ years of relevant experience.
  • Strong GPU architecture and performance optimization experience (ROCm or CUDA).
  • Proficiency in Python and C/C++, kernel development using Triton/HIP/CUDA.
  • Experience with LLM inference frameworks (vLLM, SGLang or equivalent) and serving optimization techniques.
  • Understanding of transformer and MoE architectures, quantization and distributed inference strategies.

Responsibilities

  • Partner with customers as part of the FDE team to enable and optimize large language models and multimodal models on AMD Instinct GPUs, meeting performance and accuracy targets.
  • Optimize GenAI inference pipelines with vLLM and SGLang including disaggregation, data-parallelism, and KV cache management.
  • Develop and tune low-level GPU kernels using Triton, HIP, CUDA.
  • Profile end-to-end workloads and identify bottlenecks across GPU-CPU boundaries for throughput/latency improvements.
  • Enable advanced data types and techniques (FP8, MXFP4, sparse attention) with emphasis on performance and numerical accuracy.
  • Debug runtime stability and accuracy issues in production and contribute fixes with core engineering teams.
  • Contribute optimizations to open-source frameworks (vLLM, SGLang, ATOM, AITER) and document best practices.

Skills

GPU architecture
Python
C/C++
LLM inference frameworks
Transformer/MoE architectures
Parallelism TP/DP/EP
Profiling tools
AI-assisted coding tools

Education

BS in Computer Science or Electrical Engineering
MS/PhD in Computer Science or Electrical Engineering

Tools

ROCm
CUDA
Triton
HIP
GitHub Copilot
Claude
Cursor

Job description

About the Role

We are seeking a Member of Technical Staff to join our Forward Deployed Engineering FDE team In this customer-facing role you will work directly with strategic partners and customers as part of the FDE team to enable optimize and deploy state-of-the-art GenAI inference workloads on AMD data center CPUs and GPUs Instinct family You will bridge the gap between cutting-edge AI models and AMD hardware driving competitive performance across the full inference stack

Responsibilities
  • Partner with customers as part of the FDE team to enable and optimize large language models LLMs and multimodal models on AMD Instinct GPUs meeting committed performance and accuracy targets
  • Optimize GenAI inference pipelines on vLLM and SGLang including PD disaggregation expert parallelism EP wide-EP tensor data parallelism speculative decoding and KV cache management
  • Develop and tune low-level GPU kernels Triton HIP composable kernels for attention MoE GEMM quantization and normalization operations
  • Profile end-to-end workloads identify bottlenecks across GPU CPU boundaries and deliver measurable throughput and latency improvements versus competitive targets
  • Enable advanced data types and techniques FP8 MXFP4 sparse attention with a focus on both performance and numerical accuracy
  • Debug complex runtime stability and accuracy issues in production environments partner with core engineering teams to identify root causes and contribute fixes
  • Contribute optimizations back to open-source frameworks vLLM SGLang ATOM AITER and internal libraries document best practices and deliver production-ready artifacts to customers
  • Leverage strong AI-assisted coding tools and agentic workflows strong to accelerate development debugging optimization and code review across the inference stack
What You ll Bring
  • BS MS or PhD in Computer Science Electrical Engineering or a related field along with 8 years of relevant experience
  • Solid expertise in GPU architecture and performance optimization including hands-on experience with AMD ROCm or CUDA and GPU kernel development
  • Strong proficiency in Python and C with experience developing and optimizing kernels using Triton HIP or CUDA strong Experience with AI-assisted coding strong and agentic development tools e g GitHub Copilot Claude Cursor or equivalent to enhance productivity in kernel development large-scale codebase navigation debugging and framework integration
  • Experience working with LLM inference frameworks vLLM SGLang or equivalent and serving optimization techniques
  • Solid understanding of transformer and MoE architectures quantization and distributed inference strategies
  • TP DP EP and related parallelism techniques
  • Proficiency with profiling and debugging tools e g rocProfiler ROCdebug-agent
Nice to Have
  • Experience optimizing frontier models DeepSeek Qwen Kimi MiniMax GLM etc in production environments
  • Track record of contributing to open-source AI inference frameworks
  • Experience integrating AI-driven automation into engineering workflows and developer tooling
  • Strong customer-facing communication skills and the ability to manage technical deliverables against committed timelines

BS, MS, or PhD in Computer Science, Electrical Engineering, or a related field, along with 8+ years of relevant experience.Solid expertise in GPU architecture and performance optimization, including hands-on experience with AMD ROCm (or CUDA) and GPU kernel development.Strong proficiency in Python and C++, with experience developing and optimizing kernels using Triton, HIP, or CUDA. Experience with AI-assisted coding and agentic development tools (e.g., GitHub Copilot, Claude, Cursor, or equivalent) to enhance productivity in kernel development, large-scale codebase navigation, debugging, and framework integration.Experience working with LLM inference frameworks (vLLM, SGLang, or equivalent) and serving optimization techniques.Solid understanding of transformer and MoE architectures, quantization, and distributed inference strategies (TP, DP, EP, and related parallelism techniques).Proficiency with profiling and debugging tools (e.g., rocProfiler, ROCdebug-agent).

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