Lead, Lisbon High-Speed Analog Silicon Validation

Synopsys; Viseu; Presencial; EUR 70 000 - 110 000; Tempo integral

Resumo da oferta

Synopsys in Lisbon seeks a senior validation engineer to lead our silicon validation operations for high-speed analog IP. You will manage lab resources, guide test execution, and ensure rigorous analysis across concurrent projects.

You will oversee SerDes testing, debug activities, and the generation of comprehensive validation reports, while mentoring a team of engineers and coordinating with design, applications, and product management to meet aggressive schedules.

Qualificações

• 5+ years of silicon validation, test, or characterization of analog or mixed-signal ICs.
• Experience managing technical teams, including project planning, resource allocation, and performance evaluation.
• Strong English communication skills for documentation and cross-functional collaboration.

Responsabilidades

• Lead silicon validation operations for high-speed analog ICs at Lisbon site, managing lab resources and test execution across projects.
• Direct testing and characterization of SerDes implementations using precision equipment.
• Oversee silicon debug activities and results analysis, identifying root causes and guiding design teams.
• Manage development of comprehensive validation reports documenting silicon performance and design recommendations.
• Supervise design, fabrication and bring-up of custom test boards and hardware fixtures for accurate characterization.
• Build and develop validation team through mentorship and training.
• Collaborate with analog/digital design, applications engineering, and product management to support schedules.
• Maintain and enhance lab infrastructure for optimal equipment performance.

Conhecimentos

Team leadership

Project leadership

English communication

Signal integrity analysis

Formação académica

Bachelor's in Electronic or Electrical Engineering

Ferramentas

MATLAB

Python

Verilog/VHDL

FPGA test systems

Descrição da oferta de emprego

Synopsys in Lisbon seeks a senior validation engineer to lead our silicon validation operations for high-speed analog IP. You will manage lab resources, guide test execution, and ensure rigorous analysis across concurrent projects.

You will oversee SerDes testing, debug activities, and the generation of comprehensive validation reports, while mentoring a team of engineers and coordinating with design, applications, and product management to meet aggressive schedules.