Staff Hardware Verification Engineer

Arteris; Kraków; On-site; PLN 150,000 - 230,000; Full time

Job summary

Arteris is seeking a Staff Hardware Verification Engineer in Krakow to design and execute robust verification strategies for SoCs and chiplets. You will work on parameterized IP verification, develop test benches in Python and C++, and collaborate with cross-functional teams to ensure correctness, performance and reliability of complex hardware IP.

The role requires 4+ years in verification, strong RTL language skills (VHDL/Verilog/SystemVerilog) and experience with VIPs/UVM.

Qualifications

• 4+ years of industry experience in verification engineering.
• Experience with RTL design/verification languages (VHDL/Verilog/SystemVerilog).
• Strong VIPs/UVM/testbeds and EDA tool usage.
• Fluent English; Polish/French bonus.

Responsibilities

• Define, document, develop and execute RTL verification test/coverage for highly parameterized IPs in Python and C++, on multiple RTL simulators.
• Maintain and improve verification workflows.
• Improve metrics and increase automation.
• Implement verification components such as BFMs or monitors used in verification test benches.

Skills

RTL verification

Python

C++

SystemVerilog

VHDL

Verilog

UVM

Shell scripting

AMBA/OCP protocols

team collaboration

Education

Master’s or Doctorate in engineering or computer science

Tools

Cadence

Synopsys

EDA tools

Job description

Arteris connects innovation.

Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, faster semiconductors, specifically SoCs and chiplets. From the car you drive, to the AI in the cloud, Arteris connects the innovative tech that shapes tomorrow.

Staff Hardware Verification Engineer

Location: Krakow

Arteris connects innovation.

Our technology helps the world’s most visionary companies—from startups to Fortune 500 leaders—build smarter, faster semiconductors, specifically SoCs and chiplets. From the car you drive, to the AI in the cloud, Arteris connects the innovative tech that shapes tomorrow.

What You’ll Do as a Hardware Verification Engineer at Arteris

Join our innovative team and help shape the future of semiconductor technology, specifically system-on-chip (SoC) and chiplets. In this role, you will contribute to design, implement, and execute robust verification strategies to ensure the correctness, performance, and reliability of complex hardware IP and interconnect solutions, collaborating with cross-functional teams to drive impact across cutting-edge products and solutions.

Key Responsibilities

• Define, document, develop and execute RTL verification test/coverage for extremely parameterized IPs in Python and C++, capable of running on any available RTL simulator (Cadence, Synopsys, etc.).
• Maintain and improve verification workflows.
• Improve metrics and increase automation.
• Implement verification components such as BFMs or monitors used in verification test benches.

What You Bring

• At least 4 years of industry experience as a verification engineer.
• Understanding of hardware RTL design and verification languages (VHDL, Verilog, SystemC, C++, Python, SystemVerilog).
• Strong experience in the use and development of verification methods and infrastructure (VIPs, UVM, testbeds, EDA tools).
• Experience in formal proof verification methodology is a plus
• Shell scripting experience
• Understanding of hardware communication protocols (AMBA, OCP, others)
• Curious, autonomous, rigorous and results-oriented, with a commitment to quality and a thorough approach to work.
• Proven ability to work well in a team environment
• Fluent English is a must.

Bonus Points If You Have

• Knowledge of interconnect technology is a plus
• Knowledge of Polish and/or French

Education Requirements

• Master’s degree or Doctorate in engineering or computer science

About Arteris

Arteris is a global leader in system IP used in semiconductors to accelerate the creation of high-performance, power-efficient silicon. Arteris network-on-chip (NoC) interconnect IP and system-on-chip (SoC) integration automation software are used by the world's top semiconductor and technology companies to improve overall performance, engineering productivity, reduce risk, lower costs, and bring complex designs to market faster. Learn more at arteris.com.

With over 300 team members headquartered in Silicon Valley and offices around the world, we work with startups and global tech leaders alike to build the next generation of electronic products. We believe in people, purpose and impact. Join us and help shape what comes next.