RISC-V Simics Architect — Model & Simulate SoC

UST; Polska; On-site; PLN 140,000 - 190,000; Full time

Job summary

UST seeks a skilled Simics Developer to support architecture modeling and validation for RISC-V cores. You will design, implement, and maintain architecture models and simulation environments, collaborating with cross-functional teams.

Ideal candidates have hands-on Simics experience, strong system-level modeling skills, and a robust debugging and analytical mindset for complex processor simulations.

Qualifications

• Hands-on experience with Simics development and architecture modeling.
• Strong understanding of RISC-V cores and system-level simulation.
• Proven ability to debug complex software, hardware or simulation issues.
• Collaborative engineering approach with strong analytical skills.

Responsibilities

• Design, develop, and implement architecture models using Simics.
• Support modeling and simulation with RISC-V processors and cores.
• Collaborate with teams to define and validate architectural solutions.
• Develop and maintain simulation environments for architecture work.
• Investigate and resolve issues during model implementation and validation.
• Contribute to verification efforts and ensure model accuracy and performance.
• Create and maintain technical docs related to model development.

Skills

Simics

Architecture modeling

RISC-V

System-level simulation

Debugging

Analytical thinking

Team collaboration

Tools

Simics

Python

C/C++

Job description

UST seeks a skilled Simics Developer to support architecture modeling and validation for RISC-V cores. You will design, implement, and maintain architecture models and simulation environments, collaborating with cross-functional teams.

Ideal candidates have hands-on Simics experience, strong system-level modeling skills, and a robust debugging and analytical mindset for complex processor simulations.