PD Partitioning Lead — Advanced Physical Design (10nm)

Capgemini Engineering; Województwo opolskie; Hybrid; PLN 180,000 - 300,000; Full time

Benefits offered by this job

Medicover medical care

Private life insurance

Sports card

Capgemini Helpline for wellbeing

NEXT platform training access

Job summary

Capgemini Engineering is looking for a Physical Design expert with partitioning experience who aims to become a Lead or Tech Lead on exciting projects. Join us as a PD Partitioning Lead and help shape advanced silicon design in a global, collaborative team.

You will own critical PD activities, drive floorplanning, partitioning, timing closure, and sign-off in cutting-edge nodes, with potential to lead small PD teams and influence design decisions across projects. Hybrid work model offered.

Qualifications

• Strong synthesis flow knowledge and DFT coverage.
• Excellent floorplanning, power and timing closure skills.
• Proficient in Perl/TCL/Python scripting.
• Experience with timing STA/PTSI and signal integrity.
• Excellent EM/IR, DRC, LVS, ERC analysis and fixes.
• Experience leading small teams is a plus.

Responsibilities

• Responsible for all aspects of Physical Design in full chip or block level in advanced technologies (10nm and below).
• In deep Floorplanning, partitioning/budgeting, power mesh distribution, clock tree planning and analysis, Scan re-ordering, placement, CTS, place and route.
• Cover timing analysis (closure through sign-off including SI/noise) ECO tasks (functional and timing).
• Lead validation/ qualification tasks: Formal Verification, EM/IR, DRC, LVS, Antenna, ERC analysis and fixes.
• Contribute to Low Power solution development and implementation.
• Develop/enhance timing related scripts for clock skew analysis, critical path analysis, IO interfaces, constraints partitioning/budgeting.
• Complete multiple design cycles of high complexity with little supervision.
• Possibility to lead other PD Engineers.

Skills

Synthesis flow

Floorplanning

Partitioning

Timing closure

Perl/Python scripting

EM/IR, DRC, LVS

Tape-out sign-off

Team leadership

Tools

Makefile

Timing analysis tools

Job description

Capgemini Engineering is looking for a Physical Design expert with partitioning experience who aims to become a Lead or Tech Lead on exciting projects. Join us as a PD Partitioning Lead and help shape advanced silicon design in a global, collaborative team.

You will own critical PD activities, drive floorplanning, partitioning, timing closure, and sign-off in cutting-edge nodes, with potential to lead small PD teams and influence design decisions across projects. Hybrid work model offered.