Expert Logic Design Engineer

Description Ciklum; Polska; Remoto; PLN 180.000 - 320.000; Tempo pieno

Vantaggi offerti da questo lavoro

Remote work

Medical package

Udemy access

Language courses

Certifications

MyBenefit platform

Descrizione del lavoro

Ciklum is seeking an Expert Logic Design Engineer to join our Poland team full-time. You will lead architecture, RTL, and optimization of FPGA/ASIC digital subsystems with ultra-low latency and high performance using SystemVerilog.

The role demands strong timing closure, verification collaboration, and cross-disciplinary leadership across hardware and software teams. With AMD/Xilinx expertise, you’ll drive end-to-end IP development while addressing timing, power, and resource trade-offs in a

Competenze

• Bachelor's or Master's in Electrical or Computer Engineering or equivalent.
• 6+ years in FPGA/ASIC digital logic design.
• Expert-level SystemVerilog RTL design.
• Experience with timing closure and STA.
• Ability to lead architecture and RTL implementations.
• Strong communication and mentoring skills.
• Experience with AMD/Xilinx platforms.
• Knowledge of PCIe/AXI interfaces.

Mansioni

• Lead the architecture, microarchitecture, and RTL implementation of complex, high-performance FPGA/ASIC digital subsystems.
• Design and optimize highly configurable, ultra-low-latency digital logic using SystemVerilog.
• Drive end-to-end digital IP development, from system requirements and architectural trade-offs to RTL implementation and integration.
• Make architectural decisions to optimize timing performance, latency, resource utilization, scalability, and power efficiency.
• Address timing closure, clock-domain crossing, synchronization, and critical-path optimization challenges.
• Develop advanced digital processing and control architectures, including signal processing pipelines and deterministic real-time control.
• Define hardware-software interfaces and collaborate with software and system architecture teams.
• Work with verification engineers to define verification strategies and ensure robust functional coverage.
• Review RTL designs and provide guidance on risks and improvements.
• Contribute to evolution of FPGA-based platforms and reusable digital IP for future ASICs.

Conoscenze

SystemVerilog RTL design

FPGA/ASIC architecture

Timing closure

Verification concepts

Leadership

English communication

Formazione

Bachelor's or Master's in Electrical/Computer Engineering

Strumenti

Xilinx Vivado

Synopsys VCS

QuestaSim

AMD Versal

Descrizione del lavoro

Ciklum is looking for an Expert Logic Design Engineer to join our team full-time in Poland.

We are a custom product engineering company that supports both multinational organizations and scaling startups to solve their most complex business challenges. With a global team of over 4,000 highly skilled developers, consultants, analysts and product owners, we engineer technology that redefines industries and shapes the way people live.

About the role:

We are looking for anExpert Logic Design Engineer to take a leading technical role in the architecture, design, and optimization of next-generation FPGA and ASIC-based control platforms.

This position involves solving challenging digital design problems with extremely demanding timing, latency, and performance requirements. You will work closely with system architects, verification engineers, software developers, and hardware specialists, driving technical decisions and contributing to the development of proprietary digital IP.

Our client is an innovative technology company developing advanced control and measurement systems for quantum computing. Its hardware and software platforms enable precise, real-time control of complex quantum systems, supporting the evolution of quantum computing from individual qubits to large-scale architectures.

Responsibilities:

• Lead the architecture, microarchitecture, and RTL implementation of complex, high-performance FPGA/ASIC digital subsystems
• Design and optimize highly configurable, ultra-low-latency digital logic using SystemVerilog
• Drive end-to-end digital IP development, from system requirements and architectural trade-offs to RTL implementation and integration
• Make architectural decisions to optimize timing performance, latency, resource utilization, scalability, and power efficiency
• Address complex timing closure, clock-domain crossing, synchronization, and critical-path optimization challenges
• Develop advanced digital processing and control architectures, including signal processing pipelines, waveform generation, and deterministic real-time control
• Define hardware-software interfaces and collaborate with software and system architecture teams to ensure efficient system integration
• Work closely with verification engineers to define verification strategies and ensure robust functional coverage
• Review RTL designs, identify architectural and implementation risks, and provide technical guidance to other engineers
• Contribute to the evolution of FPGA-based platforms and the development of reusable digital IP for future ASIC implementations
• Drive engineering best practices, design quality, and technical improvements across the development lifecycle

Requirements:

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related technical discipline, or equivalent practical experience
• 6+ years of professional experience in complex FPGA or ASIC digital logic design
• Expert-level proficiency in SystemVerilog RTL design (mandatory)
• Extensive experience defining digital architectures and microarchitectures for complex hardware systems
• Proven track record of independently delivering complex digital IP or subsystems from specification to implementation
• Deep understanding of RTL optimization, logic synthesis, static timing analysis (STA), and timing closure
• Strong experience optimizing digital designs for deterministic latency, high clock frequencies, resource utilization, and power efficiency
• Advanced knowledge of synchronous digital design, CDC, clocking architectures, and hardware interfaces
• Strong understanding of FPGA and/or ASIC development methodologies and implementation constraints
• Experience with simulation-based verification and debugging of complex digital systems
• Ability to evaluate architectural trade-offs, resolve challenging technical issues, and guide implementation decisions
• Strong technical leadership, analytical, and communication skills
• English proficiency sufficient for effective collaboration within an international engineering team
• Extensive experience with AMD/Xilinx FPGA architectures, particularly AMDVersal
• Advanced experience with AMDVivado, FPGA implementation, and timing closure
• Familiarity with Synopsys VCS, Siemens Questa, and related verification/debugging tools
• Experience with ASIC digital IP development and FPGA-to-ASIC design considerations
• Experience designing complex DSP pipelines, waveform generation engines, or real-time control architectures
• Deep understanding of deterministic, nanosecond-scale timing and synchronization
• Experience with high-speed interfaces such as AXI, PCIe, DDR, or proprietary interconnects
• Experience with performance, area, and power (PPA) optimization
• Knowledge of Python, Tcl, or other languages used for EDA workflow automation
• Experience leading technical design reviews or mentoring senior engineers
• Background in quantum computing, semiconductor development, telecommunications, high-performance instrumentation, or similar advanced technology domains

What’s in it for you?

• Strong community: Work alongside top professionals in a friendly, open-door environment
• Growth focus: Take on large-scale projects with a global impact and expand your expertise
• Tailored learning: Boost your skills with internal events (meetups, conferences, workshops), Udemy access, language courses, and company-paid certifications
• Endless opportunities: Explore diverse domains through internal mobility, finding the best fit to gain hands-on experience with cutting-edge technologies
• Flexibility: Enjoy flexibility – full remote working possibilities
• Care: We've got you covered with company-paid premium medical package through Luxmed
• Benefits: Access the MyBenefit cafeteria platform, allowing you to choose perks that best suit your lifestyle and needs

About us:

At Ciklum, we are always exploring innovations, empowering each other to achieve more, and engineering solutions that matter. With us, you’ll work with cutting-edge technologies, contribute to impactful projects, and be part of a One Team culture that values collaboration and progress.

With delivery centers in Wrocław and Gdańsk, our 300+ professionals in Poland drive forward-thinking solutions for global clients. Join a community where collaboration sparks innovation—and your impact reaches millions.

Explore, empower, engineer with Ciklum!

Interested already? We would love to get to know you! We can’t wait to see you at Ciklum.