Senior Principal: AI-Driven RTL-to-GDS Architect

SiFive, Inc.; Hinoba-an; On-site; PHP 397,000 - 595,000; Full time

Job summary

SiFive, Inc. in India seeks a Senior Principal Engineer of Physical Design Methodology to lead the physical implementation backbone for next-gen high-frequency CPU cores. You will shape architecture decisions, drive PPA optimization, and set standards across the organization.

You will pilot AI-native automated design methodologies, collaborate with CPU architects and EDA partners, and mentor senior engineers while ensuring scalable, predictable execution through flows-as-code.

Qualifications

• 15+ years of experience in Physical Design and Methodology.
• Master's or Ph.D. in Electrical Engineering, Computer Engineering, CS, VLSI, or related field.
• Hands-on tape-out experience with TSMC N3 is strictly required; exposure to N2 is preferred.
• Proven success deploying ML-based design space optimization tools in production environments.

Responsibilities

• Architect, validate, and mandate RTL-to-GDS roadmaps for ultra-high-frequency CPU implementation.
• Partner with CPU Architects and RTL leads during pathfinding; drive early PPA modeling and feasibility studies.
• Lead AI-native EDA transformation with ML-driven optimization and AI platforms.
• Interface with Synopsys and IP/Foundry partners to influence tool roadmaps and library architectures.
• Dictate global floor planning, timing budgeting, and multi-million gate integration strategies.
• Establish flows-as-code culture with automated telemetry dashboards and scalable build systems.
• Mentor Principal and Senior engineers to raise overall technical competence.

Skills

Physical Design

Methodology

Tape‑out Experience

N3/N2 Node

Fusion Design Platform

Fusion Compiler

IC Compiler II

PrimeTime

DSO.ai

Cerebrus

Python

Tcl

Perl

PPA

Education

Master's or Ph.D. in Electrical/Computer Engineering, CS, VLSI, or related field

Tools

Synopsys Fusion Design Platform

Synopsys Fusion Compiler

IC Compiler II

PrimeTime

DSO.ai

Job description

SiFive, Inc. in India seeks a Senior Principal Engineer of Physical Design Methodology to lead the physical implementation backbone for next-gen high-frequency CPU cores. You will shape architecture decisions, drive PPA optimization, and set standards across the organization.

You will pilot AI-native automated design methodologies, collaborate with CPU architects and EDA partners, and mentor senior engineers while ensuring scalable, predictable execution through flows-as-code.