Senior IC Layout Engineer – High-Speed RF/AMS

ASTRAWAVE TECHNOLOGY; Santo Niño 1st; On-site; PHP 700,000 - 1,200,000; Full time

Job summary

ASTRAWAVE TECHNOLOGY in the Philippines seeks experienced analog/mixed-signal layout and CAD designers to join our team in developing high speed/RF solutions that will complement our existing products. You will work with circuit design engineers to optimize layouts to meet specifications, participate in post-layout adjustments, and provide layout guidance to juniors to ensure high-quality layouts.

You will also leverage Cadence tools for pcell development and automation (Perl/Python/Tcl) and

Qualifications

• Diploma or bachelor’s in electrical/computer/electronics engineering or equivalent.
• 6+ years hands-on experience in layout engineering.
• Experience on technology node below 16nm and high-speed/RF layout.
• Experience with Cadence tools and pcell development; scripting in Perl/Python/Tcl for automation.

Responsibilities

• Realize layout design from schematic presentation.
• Layout implementation includes floor planning and device placement; power and signal routing; integrity optimization.
• Perform DRC/LVS/ERC/ANT/ESD/PERC/LVL checks and other Physical Verification tasks.
• Pass DRC rules and ensure LVS compliance; prepare materials and review layouts.
• Contribute to layout methodology and enhancement; participate in post-layout adjustments and block/IP activities.

Skills

Analog layout

RF layout

Schematic-to-layout

Team collaboration

Education

Diploma or Bachelor's in electrical/computer/electronics engineering

Tools

Cadence

Pcell scripting (Perl/Python/Tcl)

Job description

ASTRAWAVE TECHNOLOGY in the Philippines seeks experienced analog/mixed-signal layout and CAD designers to join our team in developing high speed/RF solutions that will complement our existing products. You will work with circuit design engineers to optimize layouts to meet specifications, participate in post-layout adjustments, and provide layout guidance to juniors to ensure high-quality layouts.

You will also leverage Cadence tools for pcell development and automation (Perl/Python/Tcl) and