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Cirtek Electronics Corporation is seeking an Industrial Engineer in Laguna to drive capacity planning and line balancing across semiconductor assembly and final test operations. The role involves establishing standard times, UPH targets, and OEE metrics using time studies and equipment data.
You will analyze bottlenecks, develop manpower models, and lead layout optimization for new lines and equipment installations, while also running Lean/Six Sigma improvement projects to reduce waste and
About the role
This Industrial Engineer role focuses on capacity planning and line balancing across semiconductor assembly and final test operations. You will establish and maintain standard times, UPH targets, and OEE metrics using time studies and equipment data. The position involves analyzing bottlenecks and cycle times to improve throughput and on-time delivery, developing manpower models, and leading layout design and optimization for new lines and equipment installations.
Key responsibilities
Perform capacity planning and line balancing across assembly (wafer saw, die attach, wire bond/flip chip, molding, plating, trim/form, singulation) and final test operations
Establish and maintain standard times, UPH (units per hour), and OEE targets using time studies, MOST, and equipment data
Analyze bottlenecks, WIP levels, and cycle time using Theory of Constraints and Little's Law; recommend actions to improve throughput and on-time delivery
Develop manpower models and operator-to-machine ratios; support headcount planning and cost-per-unit analysis
Lead layout design and optimization for new lines, equipment installation, and relocations, including material flow and cleanroom constraints
Run continuous improvement projects using Lean, Six Sigma (DMAIC), Kaizen, 5S, and value stream mapping to reduce waste, setup/changeover time, and downtime
Support new product introduction (NPI) and package ramp by defining routing, process flow, capacity requirements, and line readiness
Build dashboards and reports on OEE, UPH, utilization, yield loss, and productivity; present findings to management
Collaborate with Process, Equipment, Quality, Production Planning, and Supply Chain teams to resolve cross-functional constraints
Evaluate automation, MES/EAP, and Industry 4.0 opportunities, and support cost-benefit and ROI analysis
About you
Bachelor's degree in Industrial Engineering, Manufacturing Engineering, or a related engineering field
2–5 years of experience in semiconductor assembly/test or a similar high-volume manufacturing environment (fresh graduates with relevant internships may apply for junior levels)
Working knowledge of semiconductor packaging flows (leadframe, substrate/BGA, QFN, SOIC, flip chip) is a strong advantage
Solid grounding in time and motion study, line balancing, capacity modeling, and layout planning
Familiarity with Lean Manufacturing and Six Sigma (Green Belt or higher preferred)
Strong statistical and data analysis skills (SPC, DOE, regression)
Ensure compliance with safety, ESD, and cleanroom requirements