Design Verification Engineer - AI Chip Performance

Cerebras Systems; Binangonan; On-site; PHP 11,692,000 - 14,154,000; Full time

Job summary

Cerebras Systems is seeking a Design Verification engineer to join our team in Sunnyvale, CA. You will collaborate with architects, RTL, firmware and validation to ensure a high-quality silicon design and verification strategy.

You will create scalable verification environments, implement tests, manage regressions and analyze complex issues across simulation, emulation, and silicon bring-up. A BS/MS in CS/EE and 3+ years in DV are required.

Qualifications

• Bachelor’s or Master’s degree in CS/EE or equivalent.
• 3+ years of Design Verification experience.
• Deep knowledge of SystemVerilog testbenches (UVM/DPI).
• Proficient in Python or Perl scripting.
• Experience with simulators and waveform viewers.

Responsibilities

• Work with architects, designers, post-silicon and software engineers to ensure silicon works.
• Develop verification strategies, tests and coverage plans based on micro-architecture.
• Create reusable verification environments (stimulus, checkers, assertions, coverage).
• Implement tests, manage regressions, gather coverage and debug failures.
• Collaborate with cross-functional teams across architecture, RTL, physical design and firmware.
• Analyze and debug issues across simulation, emulation and silicon bring-up.

Skills

Debugging

SystemVerilog

DPI

UVM

Python

Testbench development

Education

BS or MS in Computer Science or Electrical Engineering

3+ years of Design Verification

Tools

Simulators

Waveform viewers

Automation tooling

Gate-level simulations

Job description

Cerebras Systems is seeking a Design Verification engineer to join our team in Sunnyvale, CA. You will collaborate with architects, RTL, firmware and validation to ensure a high-quality silicon design and verification strategy.

You will create scalable verification environments, implement tests, manage regressions and analyze complex issues across simulation, emulation, and silicon bring-up. A BS/MS in CS/EE and 3+ years in DV are required.