Team Lead Digital Verification

Qualinx; Delft; On-site; EUR 90,000 - 150,000; Full time

Benefits offered by this job

Stock Appreciation Rights

Extra 2% pension contribution

25 vacation days

Quarterly social events

Quarterly Lunch & Learn sessions

Quarterly social events

Lunch & Learn sessions

Job summary

A cutting-edge technology startup in the Netherlands is seeking a Team Lead Digital ASIC Verification Engineer to manage the verification of digital IP blocks and shape the future of digital RF technology. Candidates should possess a Bachelor's degree in Electrical Engineering and over 10 years of experience in ASIC verification, along with leadership experience. This role offers exciting opportunities in a supportive work environment with a focus on innovation and team collaboration.

Qualifications

• 10+ years of experience as an ASIC Verification Engineer.
• Experience in leading a team.
• Proficiency with EDA tools and design languages.
• Proficiency with EDA tools and design languages including Verilog.
• Experience with standard EDA tools like Cadence and Mentor.
• Experience in designing complex mixed-signal products containing analog blocks and microcontrollers.
• Experience with RTL and ultra-low-power designs.
• Knowledge of synthesis, STA, and netlist verifications.
• Experience in digital backend flow for Floor Planning and PNR.
• Understanding of DFT/ECO flow and test methodologies.
• Strong programming/scripting skills: C/C++, Tcl.

Responsibilities

• Responsible for the verification of digital IP blocks.
• Develop test benches and test cases for block-level verification.
• Work with backend teams to address implementation issues.
• Define verification/test plans, run regressions, and debug functional/performance bugs.
• Verify integration of IPs/Sub‑IP blocks to top-level SoC and support timing fixes for the Physical Design team.

Skills

Team leadership

System Verilog

UVM

ASIC verification

C/C++

Tcl

Mixed-signal design

Static timing analysis

Scripting

Education

Bachelor’s degree in Electrical Engineering

Tools

Cadence

Mentor Graphics

Mentor

RTL

Synthesis

Place & Route (PNR)

Power distribution

CDC

Job description

Who are we?

Imagine being part of the dynamic journey at Qualinx – a startup born when three visionary PhD Engineers from TU Delft set out to revolutionize radio chip technology. At Qualinx, we’re on a mission to conquer the high‑power consumption challenges in Global Navigation Satellite Systems and IoT sensors. With a great team of over 40 individuals, scaling to 60 next year, hosting more than 18 nationalities, we’ve achieved the impossible – the world’s lowest power GNSS chipset. Now, we’re on the verge of unleashing our game‑changing digital RF technology product, ready to flood the market with millions of annual shipments.

What Sets Us Apart

Joining Qualinx isn’t just about a job; it’s about embracing high standards, and boldly navigating unexpected challenges. We thrive on collaboration, with a commitment to self‑improvement and product excellence. At Qualinx, you’re not just an employee; you’re an integral part of our exciting journey, contributing to the growth and success of a ground‑breaking solution.

Job Description

As a Team Lead Digital ASIC Verification Engineer, you’ll play a role in shaping the future of our cutting‑edge technology. You will be responsible for the verification of our digital IP blocks and the simulation of chip‑level post‑layout within our upcoming SoCs. You will contribute to the circuit design for our next‑generation products.

• You are responsible for ASIC verification, System Verilog, and UVM.
• You will be responsible for the simulation and verification of digital block implementation in RTL for various functions, including control state machine digital processing (DSP), and multiple clock domain interface management.
• During your work at Qualinx you will be responsible for the post‑layout simulation of complex mixed‑signal SoC.
• As a Digital ASIC Verification engineer you will develop test benches and test cases for block‑level functional verification.
• You will work with our backend and implementation teams to address synthesis, timing, DFT issues for the ASIC implementation.
• You understand all design integration activities like Lint, CDC, synthesis & ECO.
• You will define the verification and test plan, run regressions, reproduce, and debug functional and performance bugs.
• You are responsible for the verification of various IPs/Sub IPs integrated to the top level SoC.
• Lastly: you will have an understanding of the design synthesis and fix timing issues for the Physical Design team.

Requirements

At Qualinx, we seek a result‑driven Team Lead Digital Verification who thrives in an environment where proactive, can‑do attitudes are celebrated. Bring your passion and expertise and join us on this exciting venture. The ideal candidate should have:

• Bachelor’s degree or higher in Electrical Engineering
• 10+ years of experience as an ASIC Verification Engineer.
• A couple of years of experience as a team lead.
• Proficiency with EDA tools and design languages including Verilog.
• Experience with standard EDA tools like Cadence and Mentor.
• You have experience in designing complex mixed‑signal products containing analog building blocks and microcontrollers.
• You have worked with RTL and ultra‑low‑power designs before. Good knowledge of digital design flow from architecture design to sign‑off.
• You understand synthesis, static timing analysis, and netlist verifications.
• You have some previous experience in digital backend flow for Floor Planning and Place & Route (PNR).
• You understand digital DFT/ECO flow.
• You have strong programming and scripting skills:, C/C++, Tcl.
• Experience in setting up Power Distribution architecture, power intent specification and validation methodology.
• Strong knowledge of clock domain crossing (CDC) techniques.
• Understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back annotation of parasitics, gate level simulation.
• Understanding of ASIC test methodology such as scan insertion, memory BIST and test pattern generation.
• Strong analytical, problem‑solving skills.

What's in it for you?

• Given that we are a startup, we provide all our employees with Stock Appreciation Rights. You will be eligible to financially profit from Qualinx's success.
• We support you in your visa process if needed.
• Saving for your pension: we provide an extra 2% of your monthly base salary.
• 25 vacation days based on a 40‑hour workweek.
• Work in a beautiful and modern office with all the necessary equipment you need to deliver a great job.
• Every quarter we organize fantastic social events, where we celebrate the success of Qualinx by going out for a great meal, playing VR games, going bowling, etc.
• At Qualinx we invest in the development of our employees, we offer Quarterly Lunch & Learn sessions to keep everyone who is interested up to speed.