Senior System Verification Engineer – xSPI & DDR

microTECH Global Limited; Netherlands; On-site; EUR 70,000 - 90,000; Full time

Job summary

microTECH Global Limited is seeking a Senior System Verification Engineer in Nijmegen, Netherlands, with expertise in xSPI and DDR. This role focuses on verifying complex SoC subsystems, including boot flows and Execute-in-Place functionality.

The ideal candidate will have over 7 years of experience, strong hands-on knowledge of SystemVerilog, UVM, and be able to debug cross-domain issues. Collaboration with architecture and software teams is essential.

Qualifications

• 7+ years of experience in SoC or System Verification.
• Strong hands-on experience with SystemVerilog and UVM.
• Proven ability to debug system-level issues across hardware and software domains.

Responsibilities

• Develop and execute system-level verification strategies for xSPI and DDR subsystems.
• Verify boot flows, memory initialisation, and Execute-in-Place (XiP) functionality.
• Create and execute software-driven verification scenarios.

Skills

xSPI protocols

DDR technologies

SystemVerilog

UVM

Boot architecture

Execute-in-Place (XiP)

Education

Bachelor's or Master's degree in Electronics, Computer Engineering, or a related field

Tools

Cadence Xcelium

Job description

Job Title: Senior System Verification Engineer – xSPI & DDR

Location: Nijmegen, Netherlands / Remote
Duration: 11 months
Start Date: ASAP
Experience: 7+ years

Role Overview

We are looking for an experienced Senior System Verification Engineer with expertise in xSPI and DDR to verify complex SoC subsystems, with a focus on boot flows and Execute-in-Place (XiP) functionality.

This role focuses on system-level verification, software-driven validation, model development, and end-to-end verification of memory subsystems. You will work closely with architecture, software, firmware, and design teams to ensure robust verification coverage across complex SoC platforms.

Key Responsibilities

• Develop and execute system-level verification strategies for xSPI and DDR subsystems
• Verify boot flows, memory initialisation, and Execute-in-Place (XiP) functionality
• Create and execute software-driven verification scenarios
• Develop and maintain UVM-based verification environments
• Analyse system-level failures and perform root-cause analysis
• Collaborate with architecture, software, firmware, and design teams throughout the verification lifecycle

Required Skills & Experience

• Bachelor's or Master's degree in Electronics, Computer Engineering, or a related field
• 7+ years of experience in SoC or System Verification
• Strong expertise in xSPI protocols and DDR technologies
• Good understanding of boot architecture and Execute-in-Place (XiP) use cases
• Experience with software development in a verification environment
• Strong hands‑on experience with SystemVerilog and UVM
• Experience using Cadence Xcelium
• Proven ability to debug system-level issues across hardware and software domains

Preferred Skills

• Experience with embedded software development
• Exposure to complex SoC memory subsystems