Senior System Verification Engineer – NETC & PCIe

microTECH Global Limited

Netherlands

On-site

EUR 60,000 - 80,000

Full time

14 days+

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Job summary

microTECH Global Limited is seeking a Senior System Verification Engineer based in Nijmegen, Netherlands, or remote. The candidate will validate networking and high-speed interface functionality in SoCs, requiring 7+ years of experience with NETC and PCIe protocols.

This role involves developing verification plans, creating system-level test scenarios, and collaborating with various teams throughout the verification lifecycle. Strong knowledge of SystemVerilog and UVM is essential.

Qualifications

  • 7+ years of experience in SoC or System Verification.
  • Strong hands-on experience with SystemVerilog and UVM.
  • Excellent debugging and problem-solving skills.

Responsibilities

  • Develop comprehensive verification plans for NETC and PCIe subsystems.
  • Create system-level test scenarios covering functional, performance, and stress use cases.
  • Validate subsystem interactions and overall SoC behaviour.

Skills

SystemVerilog
UVM
NETC architecture
PCIe protocols
Software development
Debugging
Problem-solving

Education

Bachelor's or Master's degree in Electronics, Computer Engineering, or a related field

Tools

Cadence Xcelium

Job description

Job Title: Senior System Verification Engineer – NETC & PCIe

Location: Nijmegen, Netherlands / Remote
Duration: 11 months
Start Date: ASAP
Experience: 7+ years

Role Overview

We are looking for an experienced Senior System Verification Engineer with expertise in NETC and PCIe to validate networking and high-speed interface functionality at the SoC level.

This role focuses on system-level verification, software-driven verification, and end-to-end validation of networking subsystems. You will work closely with architecture, design, firmware, and software teams to ensure robust verification coverage across complex SoC platforms.

Key Responsibilities
  • Develop comprehensive verification plans for NETC and PCIe subsystems
  • Create system-level test scenarios covering functional, performance, and stress use cases
  • Develop software-driven verification tests and supporting infrastructure
  • Validate subsystem interactions and overall SoC behaviour
  • Perform detailed debugging and root-cause analysis
  • Collaborate with architecture, design, firmware, and software teams throughout the verification lifecycle
Required Skills & Experience
  • Bachelor's or Master's degree in Electronics, Computer Engineering, or a related field
  • 7+ years of experience in SoC or System Verification
  • Strong knowledge of NETC architecture and PCIe protocols
  • Experience with software development within a verification environment
  • Strong hands‑on experience with SystemVerilog and UVM
  • Experience using Cadence Xcelium
  • Excellent debugging and problem‑solving skills
Preferred Skills
  • Knowledge of networking stacks and high-speed interfaces
  • Experience with performance verification and traffic analysis
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