Senior RTL Verification Engineer (FPGA/ASIC)

Fortaegis Technologies; Amsterdam; On-site; EUR 90,000 - 120,000; Full time

Job summary

Fortaegis Technologies in the Netherlands seeks a Design Verification Engineer to verify RTL designs for FPGA and ASIC products. You will develop verification environments, debug complex issues and ensure coverage.

You will collaborate with design, architecture and software teams, apply SystemVerilog/UVM, and stay abreast of the latest verification methodologies in a fast-scaling semiconductor company.

Qualifications

• 5+ years of RTL verification experience for FPGA/ASIC designs.
• Proficient in SystemVerilog and UVM.
• Hands-on experience with verification EDA tools (Siemens, Cadence, Synopsys).
• Strong analytical and problem-solving abilities with keen attention to detail.
• Experience with formal verification techniques is a plus.
• High-speed networking or cryptographic IP experience is advantageous.

Responsibilities

• Develop and execute verification strategies for intricate FPGA and ASIC RTL designs.
• Design, implement, and maintain verification environments, including automated test suites and infrastructure, following industry-standard methodologies.
• Identify, debug, and document design issues, collaborating closely with design engineers to validate functionality and performance.
• Implement coverage-focused verification approaches to achieve thorough verification of all design features.
• Coordinate with design, architecture, and software teams to ensure smooth integration and verification of designs.
• Stay up-to-date with verification tools, methodologies, and best practices.

Skills

RTL verification

SystemVerilog

UVM

Analytical thinking

Collaboration

Tools

Siemens

Cadence

Synopsys

Job description

Fortaegis Technologies in the Netherlands seeks a Design Verification Engineer to verify RTL designs for FPGA and ASIC products. You will develop verification environments, debug complex issues and ensure coverage.

You will collaborate with design, architecture and software teams, apply SystemVerilog/UVM, and stay abreast of the latest verification methodologies in a fast-scaling semiconductor company.