Senior FPGA Engineer – Remote/Hybrid, RTL & Verification Lead

ALTEN; Eindhoven; Hybrid; EUR 85,000 - 110,000; Full time

Benefits offered by this job

Lease car with fuel card

Hybrid working

27 vacation days (plus 10 optional)

Pension scheme without personal contib

Job summary

ALTEN Nederland seeks an experienced FPGA Engineer to design, implement, and verify FPGA architectures for the North Brabant region, primarily in the semiconductor sector. You will work on RTL development, simulation, timing analysis, and board-level bring-up, collaborating with international teams.

The role requires 5+ years of FPGA experience, strong VHDL/Verilog skills, and fluency in English; Dutch is a plus. A hybrid work setup and competitive benefits are offered by ALTEN Nederland.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 5+ years of experience in a similar role.
• Proficient in VHDL/Verilog, simulation tools, and FPGA toolchains (e.g., Xilinx Vivado, Intel Quartus).
• Fluent in English (Dutch is a plus).

Responsibilities

• Designing, implementing, and verifying FPGA architectures using VHDL or Verilog.
• Performing simulation, functional verification, and debugging with tools such as ModelSim, QuestaSim, or Vivado.
• Integrating and simulating RTL code within larger digital systems, including testbench creation.
• Translating system-level requirements into hardware specifications and FPGA design documentation.
• Running synthesis, place-and-route, timing analysis, and optimization.

Skills

Fluent English

Analytical mindset

Proactive attitude

Communication skills

Education

Bachelor’s or Master’s degree in Electrical/Computer Engineering or related field

Tools

VHDL

Verilog

ModelSim

QuestaSim

Vivado

Quartus

Job description

ALTEN Nederland seeks an experienced FPGA Engineer to design, implement, and verify FPGA architectures for the North Brabant region, primarily in the semiconductor sector. You will work on RTL development, simulation, timing analysis, and board-level bring-up, collaborating with international teams.

The role requires 5+ years of FPGA experience, strong VHDL/Verilog skills, and fluency in English; Dutch is a plus. A hybrid work setup and competitive benefits are offered by ALTEN Nederland.