Senior Compiler Engineer — Neuromorphic AI Accelerators

Innatera Nanosystems

Delft

On-site

EUR 90,000 - 120,000

Full time

14 days+
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Job summary

Innatera Nanosystems is seeking a Senior Compiler Engineer to advance the compiler framework for their neuromorphic AI accelerator at the edge. You will own end-to-end compiler development and partner with SDK, algorithm, architecture, and hardware teams to maximize performance and energy efficiency on our chip.

The role requires strong Python and C++ skills, experience with MLIR/TVM, and hands-on work with PyTorch or TensorFlow.

Qualifications

  • Design and implement the compiler for next-generation AI accelerator architectures.
  • Collaborate cross-functionally with SDK team members as well as algorithm, architecture, and hardware teams to gather compiler requirements.
  • Provide feedback to hardware engineers to refine future architectural designs based on insights gained from compiler optimizations.
  • Stay at the forefront of neural network compiler technologies, introducing innovative solutions and industry best practices to the team.

Responsibilities

  • Design and implement the compiler for next-generation AI accelerator architectures.
  • Collaborate cross-functionally with SDK team members as well as algorithm, architecture, and hardware teams to gather compiler requirements.
  • Provide feedback to hardware engineers to refine future architectural designs based on insights gained from compiler optimizations.
  • Stay at the forefront of neural network compiler technologies, introducing innovative solutions and industry best practices to the team.

Skills

Python
C++
Neural networks
PyTorch
TensorFlow
MLIR/TVM
Computer architecture
Prototyping
Communication

Tools

MLIR
TVM
GCC/LLVM

Job description

Innatera Nanosystems is seeking a Senior Compiler Engineer to advance the compiler framework for their neuromorphic AI accelerator at the edge. You will own end-to-end compiler development and partner with SDK, algorithm, architecture, and hardware teams to maximize performance and energy efficiency on our chip.

The role requires strong Python and C++ skills, experience with MLIR/TVM, and hands-on work with PyTorch or TensorFlow.

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