Senior ASIC Verification Engineer | SoC/UVM Specialist

European Tech Recruit; Amsterdam; On-site; EUR 70,000 - 90,000; Full time

Job summary

A leading tech recruitment firm is seeking an experienced ASIC Verification Engineer in Amsterdam. The ideal candidate has over 5 years in ASIC verification, strong UVM expertise, and a detail-oriented approach. Responsibilities include developing verification plans and collaborating with design engineers. This role requires proficiency in SystemVerilog and a solid understanding of digital logic design. Apply now to be part of a pioneering semiconductor team.

Qualifications

• 5+ years of professional experience in ASIC verification.
• Strong background in digital logic design and verification principles.
• Hands-on experience with complex SoC verification.

Responsibilities

• Architect and implement UVM-based verification environments.
• Develop comprehensive verification plans and design focused test cases.
• Troubleshoot and debug design issues.

Skills

UVM expertise

Digital logic design

C/C++ programming

Scripting skills (Tcl, Perl, Python)

Education

Bachelor’s degree in Electrical or Computer Engineering

Tools

SystemVerilog

QEMU

Job description

A leading tech recruitment firm is seeking an experienced ASIC Verification Engineer in Amsterdam. The ideal candidate has over 5 years in ASIC verification, strong UVM expertise, and a detail-oriented approach. Responsibilities include developing verification plans and collaborating with design engineers. This role requires proficiency in SystemVerilog and a solid understanding of digital logic design. Apply now to be part of a pioneering semiconductor team.