Mask Design Engineer

SMART Photonics

Eindhoven

On-site

EUR 60,000 - 80,000

Full time

14 days+

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Job summary

A leading company in photonics is seeking a Mask Design Engineer to oversee layout design and tape-out processes for photonics-integrated chips. This role involves close collaboration with development teams and requires a detail-oriented mindset. The ideal candidate will have extensive experience in semiconductor design and a strong proficiency in scripting, particularly Python.

Qualifications

  • Minimum 5 years of industry experience in photonics IC or semiconductor industry.
  • Hands-on experience in layout design of semiconductor devices.

Responsibilities

  • Review layouts and conduct Design Rule Checks (DRC).
  • Develop and maintain automated layout generation scripts.
  • Provide technical support and guidance for PDK usage.

Skills

Attention to Detail
Problem-Solving
Collaboration
Scripting

Education

Master’s or Ph.D. in (integrated) Photonics

Tools

Klayout
Python

Job description

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The design enablement team is the bridge between their process development, device design and photonics circuit designers. They provide the tools, methodologies, and services to our customers (internal/external) so that they can access our technology and translate their concepts into manufacturable Photonics Integrated Circuits (PIC). The team is in constant improvement and adding more capabilities, so opportunities to develop yourself and new services and methodologies will be available.

Job Description

In this role, you will be responsible for the layout design, review, and tape-out process of lithographic masks and reticles, ensuring our customers’ high-quality manufacturing of photonics-integrated chips. You will support the PIC manufacturing of our different platforms serving different markets. You will collaborate closely with our commercial and development teams to provide on-time, high-quality mask services.

As a Mask Design Engineer, you will serve as a crucial link between our technology and our customers, providing and maintaining the tools and guidance on the optimal use of our Process Design Kit (PDK). You bring a high-quality mindset to your work; attention to detail is critical for this role!

In this position, you will mainly design and perform from behind your laptop. This requires you to love your PC and be perfectly fine designing layout without too many people bothering you.

You will report to the Design enablement Team Lead.

Key Responsibilities:

  • Review incoming layouts and conduct Design Rule Checks (DRC) to ensure compliance with our manufacturability;
  • Develop and maintain automated layout generation scripts and workflow for mask creation;
  • Debug layout issues and provide recommendations for corrections;
  • Manage the full mask data preparation flow and order the masks;
  • Work closely together with both design and processing experts to enable their development work by mask designs (e.g. R&D and integration teams);
  • Maintain mask supplier relations;
  • Support PDK activities;
  • Provide technical support and guidance to customers for practical usage of the PDK;
  • Compile and maintain documentation;
  • Master’s or Ph.D. in (integrated) Photonics, semiconductors or related field;
  • On top, a minimum of 5 years of industry experience in photonics IC or semiconductor industry;
  • Hands-on experience in layout design of semiconductor devices;
  • Experience with Klayout;
  • Strong understanding of DRC, GDS and mask data preparation processing;
  • Proficiency in scripting. You are a Pythonist!
  • Strong teamwork and collaboration skills, being able to work effectively with customers, mask houses, and cross-functional teams;
  • Problem-solving mindset and good communication skills;
  • A commitment to delivering the highest quality standards to customers!


Preferred:

  • Expertise in developing PDK elements;
  • Experience in integrated photonics and/or semiconductor foundry;
  • Familiarity with EPDA tools such as Nazca, Synopsis Optodesigner/Optocompiler, Luceda IPKISS;
  • Expertise in semiconductor fabrication.

Seniority level
  • Seniority level
    Mid-Senior level
Employment type
  • Employment type
    Full-time
Job function

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