ASIC Digital Verification, Sr Staff Engineer

Synopsys Inc; Eindhoven; On-site; EUR 75,000 - 120,000; Full time

Job summary

Synopsys Eindhoven seeks an experienced verification expert to design and execute verification strategies for security IP subsystems. You will build UVM testbenches, apply formal methods, and develop coverage models tied to product requirements.

The role involves automating regression, debugging RTL/testbench, and validating hardware/software integration on FPGA and simulators. You will join the Eindhoven Security IP team, collaborating with HW/SW engineers to protect devices across automotive,

Qualifications

• 6+ years hands-on verification experience in digital hardware IP.
• Proven track record verifying IP through multiple tape-outs or product releases.
• Deep expertise in SystemVerilog, UVM, assertion-based verification, and formal verification.
• Strong understanding of IC design flows and RTL handoff to implementation.

Responsibilities

• Design and execute verification strategies for security IP subsystems with digital components.
• Build and maintain UVM testbenches and formal verification flows for IP subsystems.
• Develop test plans, specifications, and coverage models aligned to product requirements.
• Automate regression environments using scripting to enable continuous verification.
• Run verification tests in simulators and on FPGA platforms.
• Debug RTL and testbench issues, root-cause defects with design teams.
• Apply formal verification to prove properties and corner cases.
• Support embedded software and driver verification for hardware/software integration.

Skills

SystemVerilog

UVM

Assertion-based verification

Coverage-driven methodology

Formal verification techniques

RTL design principles

Scripting (Python)

Scripting (Perl)

Scripting (TCL)

Education

Bachelor’s or Master’s degree in Electrical Engineering or Computer Science

Tools

Python

Perl

TCL

Job description

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI‑powered products. We deliver industry‑leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years verifying digital hardware that ships in production silicon, where missed corner cases have real consequences. You understand that verification requires building strategies that prove designs work before tape‑out, not just running tests. You work effectively with UVM testbenches, formal verification, and assertion‑based methodologies to validate complex IP components.

You are comfortable taking IP component and subsystem specifications and developing suitable verification approaches. You can distinguish between testbench issues and design defects, and you communicate findings clearly to design teams. Security matters to you as a technical discipline, and you understand that embedded security IP requires different verification approaches. At Synopsys, you will work on security IP protecting devices across automotive, mobile, networking, and IoT applications with an experienced Eindhoven team.

What You’ll Be Doing

• Design and execute verification strategies for complex security IP subsystems with digital components including cryptographic cores, random number generators, interface modules and memories
• Build and maintain UVM testbenches, assertion‑based verification environments, and formal verification flows for IP subsystems
• Develop test plans, test specifications, and coverage models that map to product requirements
• Automate regression environments using scripting to ensure continuous verification across design iterations
• Run verification tests in both simulator environments and on FPGA platforms
• Debug failures at the RTL and testbench level, working directly with design engineers and architects to root‑cause and resolve defects
• Apply formal verification techniques to prove properties and corner cases that simulation cannot easily reach
• Support embedded software and driver verification to ensure hardware‑software integration works correctly in real system contexts

The Impact You Will Have

• Your verification strategies will catch critical bugs before product release or tape‑out, protecting Synopsys customers from costly silicon respins and security vulnerabilities in production devices
• The test plans and coverage models you build will define the quality bar for security IP used in automotive, mobile, and IoT systems worldwide
• Your automation work will accelerate regression cycles and free up engineering time for deeper verification challenges
• The formal verification flows you develop will prove correctness in areas where simulation alone is insufficient, raising confidence across the product line
• Your collaboration with design and architecture teams will shape IP that meets both functional and security requirements from the start
• The debugging and root‑cause analysis you perform will directly improve design quality and reduce time to market
• Your expertise will help the Eindhoven team stay ahead of evolving security threats and verification methodologies

What You’ll Need

• Bachelor’s or Master’s degree in Electrical Engineering or Computer Science with 6+ years of hands‑on verification experience
• Proven track record verifying digital hardware IP components through multiple tape‑outs or product releases
• Deep expertise in SystemVerilog, UVM, assertion‑based verification, coverage‑driven methodology, and formal verification techniques
• Strong understanding of IC design flows, RTL design principles, and the handoff between verification and implementation
• Experience automating verification flows and building regression environments using scripting languages like Python, Perl, or TCL
• Solid knowledge of embedded hardware and software environments, including how IP integrates into SoC architectures
• Knowledge of security protocols, cryptographic algorithms, or embedded security is a strong plus
• Experience with IP synthesis flows from RTL to netlist, verifying correctness of timing and synthesis constraints is a plus

Who You Are

• You can analyze a security subsystem specification, identify verification challenges and propose a verification strategy for the subsystem including its IP components
• You develop testbenches and verification environments that are maintainable and can be extended by other engineers
• You provide constructive feedback when test plans or coverage models need strengthening, focusing on technical gaps and solutions
• You work effectively across time zones with global teams, maintaining clear communication and alignment on verification goals
• You stay current on verification methodologies and security developments to ensure your approach remains effective
• You communicate verification findings clearly to design engineers and architects, focusing on root cause and resolution path

The Team You’ll Be Part Of

You will join the Security IP group in Eindhoven, a dedicated team advancing embedded security technologies that enable customers to build chips with cutting‑edge cryptographic solutions. The team is made up of world‑class hardware and software engineers focused on delivering security IP found in advanced devices across automotive, networking, mobile, and IoT applications. This is a global group that takes security seriously and builds products to the Synopsys standard for best‑in‑class quality.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.