System Validation Engineer: Post-Silicon Debug

UST; Bayan Lepas; On-site; MYR 60,000 - 110,000; Full time

Job summary

UST is seeking a dynamic Systems Validation Engineer to join its semiconductor product validation team in Malaysia. The role focuses on developing methodologies, executing system integration plans, and debugging failures across architecture, design, and pre-silicon teams.

You will work with global teams to define test strategies, drive end-to-end validation from planning to issue resolution, and deliver management-ready reports.

Qualifications

• B.Sc. or M.Sc. in Electrical/Computer Engineering or related field.
• 3+ years of validation and debugging experience in the semiconductor/embedded domain.
• Self-motivated and able to work independently and efficiently to meet timelines.

Responsibilities

• Define test strategy with global teams and develop post-silicon validation plans.
• Collaborate with architecture, design, and pre-silicon teams to improve test content.
• Deliver project reports to management and highlight risks with mitigation plans.
• Improve system level integration and test methodologies and processes.
• Work with hardware and software teams to debug and tackle complex issues.
• Develop and enhance automation features according to requirements.

Skills

System validation

Debugging

Python

Linux

Windows

Test strategy

Cross-team collaboration

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

NVIDIA GPU

Automation frameworks

Job description

UST is seeking a dynamic Systems Validation Engineer to join its semiconductor product validation team in Malaysia. The role focuses on developing methodologies, executing system integration plans, and debugging failures across architecture, design, and pre-silicon teams.

You will work with global teams to define test strategies, drive end-to-end validation from planning to issue resolution, and deliver management-ready reports.