Staff Engineer Mask Design

Infineon; Penang; On-site; MYR 120,000 - 180,000; Full time

Job summary

Infineon Technologies AG in Malaysia seeks a skilled Mask Design Engineer to drive layout development and verification. You will work with global design teams to create and refine analog and digital layouts, perform floorplanning, and lead top-level routing with LVS/DRC checks.

Ideal candidates hold a Bachelor's or Master’s in Electronic/ Semiconductor Engineering with 5–7 years of relevant experience, and have familiarity with Siemens EDA, Calibre, Cadence, and Virtuoso tools.

Qualifications

• Bachelor's or Master’s in Electronic Engineering, Semiconductor Engineering, Physics or related field.
• Typically 5-7 years of semiconductor industry experience in mask / layout engineering.
• Strong understanding of semiconductor manufacturing processes, IC layout design, DRC, LVS.

Responsibilities

• Develop and verify custom layout.
• Collaborate with layout and design teams.
• Create floorplan blocks from scratch.
• Create and modify complex analog & digital layouts.
• Perform top level routing.
• Verify LVS and DRC related flows.
• Participate in reviews with layout leads and design team.

Skills

Layout engineering

VLSI design

Education

Bachelor's in Electronic Engineering

Master’s in Electronic Engineering

Tools

Siemens EDA (Mentor Graphics)

Calibre DRC/LVS

Cadence

Virtuoso

Job description

This role offers the opportunity to work on advanced semiconductor technologies and collaborate with global design teams on cutting-edge products.

Key responsibilities

Mask Design Engineer is responsible for the development, verification of custom layout. This role works closely with layout and design team. Floorplan blocks from scratch. Create and modify complex analog & digital layouts. Top level routing. Verify LVS, DRC related flows. Participate in reviews with layout leads and design team.

Qualifications and skills to help you succeed

Bachelor's or Master’s, in Electronic Engineering, Semiconductor Engineering, Physics or related field. Typically 5-7 years of semiconductor industry experience in mask / layout engineering. Strong understanding of Semiconductor manufacturing processes, IC layout design, Design Rule Checking (DRC), Layout Versus Schematic (LVS).

Technical Skills

• Siemens EDA (Mentor Graphics)
• Calibre DRC/LVS
• Cadence
• Virtuoso #WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience.

Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.