SoC RTL/Logic Engineer - High-Impact IP & SoC Design

Intel Corporation; George Town; Presencial; MYR 120.000 - 240.000; Jornada completa

Descripción de la vacante

Intel Corporation Malaysia, Devices Development Group Malaysia (DDG-MYS) Client SoC Team is seeking a talented engineer to join as a SoC RTL/Logic Staff Design Engineer in Penang. You will contribute to Intel's next-generation Client product families and help deliver world-changing technology to people around the globe.

You will own IP RTL design, integrate IP into SoC platforms, and drive front-end quality checks, power/clock domain handling, and verification collaboration to ensure production

Formación

• Bachelor's or master's degree in EE, CE, CS, or related discipline.
• At least 3 years of IP or SoC RTL/Logic design experience.
• Knowledge of IP/subsystem architecture and high-speed bus protocols.
• Experience using AI tools to improve RTL/Logic development productivity.

Responsabilidades

• Own DDG internal IP RTL design and development or integrate IP into Client SoC platforms.
• Define, implement, and deliver new IP features, change requests, and feature enhancements.
• Drive IP-to-SoC handoff quality, ensuring design completeness, compliance, and readiness for downstream integration.
• Perform logic and RTL integration into SoC, including power intent definition, signal handling across power planes and clock domains, and delivery of front-end collateral for system and software integration.
• Develop design solutions and collaborate closely with verification teams to validate functionality, features, and integration readiness.
• Execute front-end quality checks across RTL static analysis, synthesizability, timing and power convergence, netlist quality, formal equivalence verification, and related design quality milestones.
• Interpret power specifications and translate power requirements into design considerations, analysis plans, and measurable checks.
• Support power estimation, analysis, rollup, and convergence. Investigate power issues, identify root causes, and recommend design or flow solutions.

Conocimientos

IP/SoC RTL/Logic design

Verilog/SystemVerilog

SoC/IP integration

Power and clock domain handling

Front-end verification collaboration

Educación

Bachelor or Master Degree in Electrical and Electronic Engineering, Computer Engineering, Computer Science, or a related discipline

Herramientas

Verilog

SystemVerilog

Synthesis tools

Descripción del empleo

Intel Corporation Malaysia, Devices Development Group Malaysia (DDG-MYS) Client SoC Team is seeking a talented engineer to join as a SoC RTL/Logic Staff Design Engineer in Penang. You will contribute to Intel's next-generation Client product families and help deliver world-changing technology to people around the globe.

You will own IP RTL design, integrate IP into SoC platforms, and drive front-end quality checks, power/clock domain handling, and verification collaboration to ensure production