SoC IP Design & Verification Engineer — Hybrid Role

Intel Corporation; Kuala Lumpur; Hybrid; MYR 120,000 - 180,000; Full time

Job summary

Intel Corporation in Malaysia is seeking an RTL design and verification engineer to contribute to design, development, and validation of next-generation SoC IPs. You will work with Verilog/SystemVerilog, run simulations, and collaborate with cross-functional teams to ensure IP interoperability.

The role requires a degree in electrical/computer engineering or computer science, strong HDL skills, and experience with EDA tools like ModelSim and Synopsys VCS, plus scripting in Python or Perl for

Qualifications

• Bachelor's degree in Electrical/Electronics/Computer Engineering or Computer Science.
• Proficiency in Verilog or SystemVerilog HDL.
• Knowledge of digital design, simulation, and verification methodologies.
• Experience with Python, Perl, or Shell scripting.
• Familiarity with ModelSim and Synopsys VCS and common protocols.

Responsibilities

• Design, develop, and verify Intel SoC IPs.
• Use Verilog/SystemVerilog to validate IPs within SoC architectures.
• Collaborate with architects and cross-functional teams for IP interoperability.
• Develop test plans, run simulations, and perform coverage analysis.
• Assist debugging for pre-silicon validation and readiness challenges.
• Create documentation including specifications and test plans.
• Develop automation scripts to streamline workflows.
• Contribute to process improvements in SoC development.

Skills

Verilog/SystemVerilog

Digital design

Simulation/verification

Python

Perl

Shell scripting

ModelSim

Synopsys VCS

Education

Bachelor's degree in Electrical/ Electronics/ Computer Engineering or Computer Science

Tools

ModelSim

Synopsys VCS

Job description

Intel Corporation in Malaysia is seeking an RTL design and verification engineer to contribute to design, development, and validation of next-generation SoC IPs. You will work with Verilog/SystemVerilog, run simulations, and collaborate with cross-functional teams to ensure IP interoperability.

The role requires a degree in electrical/computer engineering or computer science, strong HDL skills, and experience with EDA tools like ModelSim and Synopsys VCS, plus scripting in Python or Perl for