Senior USB IP Verification Engineer Pre-Silicon Innovator

Intel; Kulim; Hybrid; MYR 120,000 - 180,000; Full time

Job summary

Intel in Malaysia is seeking an IP Design Verification Engineer to verify USB/IP designs, develop test plans, and collaborate with RTL, architecture and physical design teams to ensure quality and performance across products.

The role focuses on pre-silicon verification, system-level simulations, coverage, and debugging, with a hybrid work model and opportunities to influence next-generation silicon technologies.

Qualifications

• Bachelor's degree in a relevant engineering or computer science field.
• 6–8 years of RTL design verification experience with SystemVerilog and UVM/OVM.
• Experience designing test plans and testbench infrastructure with monitors, scoreboards, BFMs, and coverage points.
• Familiarity with pre-silicon verification tools and scripting for automation (Python/Perl/Shell).
• Understanding of high-speed IPs (USB, PCIe, AMBA) and VLSI design flows.

Responsibilities

• Develop functional verification plans and test benches for microarchitecture specs.
• Execute verification strategies using system simulations to analyze power, timing, and functionality.
• Address failing tests and debug issues in pre-silicon environments.
• Collaborate with architects, RTL developers, and physical design teams to validate features.
• Maintain and improve verification infrastructure and methodologies.
• Document test plans and lead technical reviews with design teams.
• Improve test coverage, efficiency, and validation through innovative approaches.

Skills

RTL design verification

SystemVerilog

UVM/OVM methodologies

test plans & testbenches

pre-silicon verification tools

Education

Bachelor's degree in Electrical, Electronics, Computer Engineering, CS

Tools

VCS

Synopsys

Job description

Intel in Malaysia is seeking an IP Design Verification Engineer to verify USB/IP designs, develop test plans, and collaborate with RTL, architecture and physical design teams to ensure quality and performance across products.

The role focuses on pre-silicon verification, system-level simulations, coverage, and debugging, with a hybrid work model and opportunities to influence next-generation silicon technologies.