Senior USB IP Verification Engineer - Pre-Silicon

Intel Corporation; Penang; Hybrid; MYR 180,000 - 260,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Intel Corporation in Malaysia, Penang, is seeking an IP Design Verification Engineer to verify USB IP designs, ensuring functionality and performance in a fast-paced environment. You will work to meet architectural specs and drive reliable silicon deliverables.

The role involves developing verification plans, building test benches, collaborating with architects, RTL and physical teams, and improving verification infrastructure.

Qualifications

• Bachelor's degree in electrical/electronics/computer engineering or equivalent.
• 6–8 years RTL design verification with SystemVerilog and UVM/OVM.
• Experience with test plans, testbench infrastructure (monitors, scoreboards, BFMs) and coverage points.

Responsibilities

• Develop functional verification plans and test benches for microarchitecture specs.
• Execute verification strategies with system simulations to analyze power, timing, and bugs.
• Address failing tests and debug in the pre-silicon environment.
• Collaborate with architects, RTL and physical design teams to validate features.
• Maintain and improve verification infrastructure and methodologies.
• Document test plans and lead technical reviews with design and architecture teams.
• Enhance test coverage, efficiency, and execution time through innovation.

Skills

SystemVerilog

UVM/OVM

Testbench development

Python scripting

Debugging

Power-aware verification

Education

Bachelor's degree in Electrical/Electronics/Computer Engineering or equivalent

Master's or PhD (preferred)

Tools

VCS/Synopsys

BFMs

Job description

Intel Corporation in Malaysia, Penang, is seeking an IP Design Verification Engineer to verify USB IP designs, ensuring functionality and performance in a fast-paced environment. You will work to meet architectural specs and drive reliable silicon deliverables.

The role involves developing verification plans, building test benches, collaborating with architects, RTL and physical teams, and improving verification infrastructure.