Senior Staff PCIe Verification Architect

AMD; George Town; On-site; MYR 180,000 - 300,000; Full time

Job summary

AMD Penang invites an experienced ASIC/SoC verification engineer to join the PCIe IP Verification team. You will develop and maintain infrastructure and testbenches, collaborating with design and architecture to validate PCIe SS IP features.

The role requires 8+ years of ASIC verification experience, strong SystemVerilog/UVM skills, and a track record with PCIe or high-speed IO protocols. Fluency in English and leadership experience are preferred.

Qualifications

• MSEE with 8+ years or BSEE with 10+ years in digital ASIC/SOC design verification.
• Strong SystemVerilog and UVM skills with PCIe or high-speed IO experience.
• Fluent written and spoken English; leadership experience preferred.

Responsibilities

• Develop and update infrastructure and environment for IP level design verification.
• Collaborate with Design and Architecture to develop new verification components.
• Define verification plans and closure for PCIe SS IP features.

Skills

UVM

SystemVerilog

Verilog

PCIe

Testbench architecture

English communication

Education

MSEE

BSEE

Job description

AMD Penang invites an experienced ASIC/SoC verification engineer to join the PCIe IP Verification team. You will develop and maintain infrastructure and testbenches, collaborating with design and architecture to validate PCIe SS IP features.

The role requires 8+ years of ASIC verification experience, strong SystemVerilog/UVM skills, and a track record with PCIe or high-speed IO protocols. Fluency in English and leadership experience are preferred.