Senior PCIe Verification Lead, Subsystem

Advanced Micro Devices; Penang; Hybrid; MYR 180,000 - 240,000; Full time

Job summary

AMD Penang is seeking an experienced ASIC verification engineer to join the PCIe SubSystem team. You will verify PCIe SS IP across dGPU, APUs, servers and game consoles, developing verification plans and driving verification closure while collaborating with Design and Architecture to deliver new components.

The ideal candidate has 8+ years in ASIC/SOC verification, strong UVM/SystemVerilog/Verilog skills, and leadership experience.

Qualifications

• 8+ years of ASIC/SOC design verification experience.
• Experience leading a team on testbench architecture.
• Strong knowledge of PCIe and high‑speed I/O protocols.

Responsibilities

• Develop and update infrastructure and environment for IP level design verification.
• Closely working with Design and Architecture team to develop new verification component.
• Responsible for PCIe SS IP new features verification plan and verification closure.

Skills

UVM

SystemVerilog

Verilog

PCIe

Testbench architecture

Leadership

ASIC verification

Formal verification

Education

MSEE with 8+ years

BSEE with 10+ years

Job description

AMD Penang is seeking an experienced ASIC verification engineer to join the PCIe SubSystem team. You will verify PCIe SS IP across dGPU, APUs, servers and game consoles, developing verification plans and driving verification closure while collaborating with Design and Architecture to deliver new components.

The ideal candidate has 8+ years in ASIC/SOC verification, strong UVM/SystemVerilog/Verilog skills, and leadership experience.