Senior/Staff Custom Layout Engineers

SkyeChip Berhad; Penang; In loco; MYR 180.000 - 300.000; Tempo pieno

Vantaggi offerti da questo lavoro

Stock options

Career advancement opportunities

Competitive pay and benefits

Descrizione del lavoro

SkyeChip Berhad seeks an experienced Custom Analog Layout Engineer in Malaysia to lead AMS layout efforts across on-site Penang, Selangor and Vietnam sites. You will mentor, coordinate with circuit/physical teams, and drive layout quality for complex analog/mixed-signal ICs.

8–10+ years of hands-on layout, deep-submicron experience, and proficiency in Cadence Virtuoso and Calibre are expected. Opportunity for growth in a dynamic startup environment with competitive pay.

Competenze

• 8–10+ years in custom microelectronics layout design.
• Proven floor planning and full-chip integration for analog/mixed-signal ICs.
• Hands-on in sub-5nm processes and CMOS tape-outs.
• Strong understanding of layout effects on performance.
• Experience with DRC, LVS, and parasitic optimization.
• Proficient with Cadence Virtuoso and Synopsys Custom Compiler.

Mansioni

• Lead layout teams through all project phases from planning to tape out.
• Perform floor planning and full-chip layout for AMS ICs.
• Collaborate with circuit and physical design to ensure quality.
• Mentor mid and junior layout engineers.
• Address layout challenges including DRC, LVS, and electromigration.
• Track schedules and coordinate cross-functional activities.
• Participate in reviews to ensure manufacturability.
• Drive automation improvements in layout methodology.

Conoscenze

AMS layout

Deep sub-micron

Scripting: Python

Scripting: Tcl

Mentorship

Layout leadership

Strumenti

Cadence Virtuoso

Synopsys Custom Compiler

ICV/Calibre

Descrizione del lavoro

Location (on-site): Malaysia (Penang, Selangor) and Vietnam (Da Nang, Ho Chi Minh)

Role Summary

We are seeking motivated and detail-oriented Custom Analog Layout Engineers to join our IC design team. This is also an excellent opportunity for early-career engineers to grow under the mentorship of experienced professionals while contributing to analog/mixed-signal layout projects.

Key Responsibilities

• Lead and manage layout teams through all project phases—from planning, execution, to final tape out.
• Perform floor planning and full-chip layout in Analog/Mixed‑Signal IC designs.
• Collaborate closely with circuit design and physical design to deliver high-quality layout.
• Provide guidance and mentorship to mid and junior-level layout engineers.
• Solve layout-related challenges including DRC, LVS, parasitic optimization, and electromigration.
• Ensure schedules and deadlines are met through proactive project tracking and cross‑functional coordination.
• Participate in reviews and sign‑off procedures to ensure layout quality and manufacturability.
• Drive continuous improvement in layout automation, methodology, and efficiency.

Requirements

• 8–10+ years of professional experience in custom microelectronics layout design.
• Proven track record in floor planning and full‑chip integration for complex analog/mixed‑signal ICs.
• Hands‑on experience in deep sub‑micron process nodes (preferably down to 5nm).
• Strong understanding of layout effects on circuit performance—capacitance, noise, speed, and electromigration.
• Experience with tape outs of complex ICs/IPs using state‑of‑the‑art CMOS technologies, with products successfully released to production.
• Proficient in physical verification (ERC, DRC, LVS, DFM, ANTENNA rules) using ICV/Calibre.
• Skilled in Cadence Virtuoso and Synopsys Custom Compiler layout tools.
• Good knowledge of signal planning and ESD‑aware layout practices.
• Added advantages:
  • Experience in automation scripting (e.g., SKILL, Python, Tcl) is a strong plus.
  • Familiarity with layout methodologies for advanced packaging (e.g., 2.5D, 3D IC) is a plus.
  • Strong problem‑solving skills and ability to work independently.
• Excellent communication and teamwork abilities.
• High attention to detail and solid documentation practices.

About SkyeChip

We set our eyes to be a global IC company powered by Malaysian talents, focusing on delivering cutting edge IPs and ASIC solutions to accelerate AI Deep Learning and High-Performance Computing systems.

We are looking for high aiming IC design engineers to join us and seize the golden startup opportunity. We have a high growth market and keen customers waiting for our technology solutions. We value innovation, different perspectives, ideas, and we are committed to help you reach your full potential.

We offer competitive pay and benefits, generous stock options to share the company's success and unlimited career advancement opportunities! With Skyechip, the sky is the limit.

About SkyeChip

We set our eyes to be a global IC company powered by Malaysian talents, focusing on delivering cutting edge IPs and ASIC solutions to accelerate AI Deep Learning and High-Performance Computing systems.

We are looking for high aiming IC design engineers to join us and seize the golden startup opportunity. We have a high growth market and keen customers waiting for our technology solutions. We value innovation, different perspectives, ideas, and we are committed to help you reach your full potential.

We offer competitive pay and benefits, generous stock options to share the company's success and unlimited career advancement opportunities! With Skyechip, the sky is the limit.