Senior FPGA/CPLD Engineer for High-Performance Data Centers

Celestica; Bayan Lepas; On-site; MYR 120,000 - 180,000; Full time

Job summary

Celestica Malaysia Penang is seeking an FPGA/CPLD engineer to design, implement and validate FPGA/CPLD solutions for data center platforms. You will define architecture, write RTL, run simulations, and validate hardware with hardware/software teams to ensure robust, high-quality products.

The role requires deep expertise in Verilog/SystemVerilog, FPGA tools, and high-speed serial interfaces, with collaboration across hardware and software groups and opportunities to mentor junior engineers.

Qualifications

• Bachelors or Masters in Computer Science, Communication and System Engineering, Electrical Engineering or related fields.
• BSEE with 8+ years of FPGA/CPLD experience or MSEE with 5+ years, familiar with Xilinx and Intel(Altera) FPGA and Lattice CPLD/FPGA.
• In depth knowledge with Verilog, System Verilog, RTL design, FPGA/CPLD design, and FPGA/CPLD design tools (eg. ISE, Vivado, Quartus II, Diamond, Modelsim).
• In depth knowledge with high speed serial protocols such as PCIe/ USB/ Ethernet/DDR/LVDS;
• Familiar with SPI , eSPI , I2C , UART , LPC , MDIO etc low speed interface
• Familiar with UVM constrained random coverage driven concepts, assertion based verification and functional coverage techniques
• Proficient in understanding hardware schematics and PCB designs for FPGA/CPLD pinout constraints and on board validation.
• Proficient in using oscilloscopes, multimeters, logic analyzers, and various hardware debugging tools.

Responsibilities

• Define FPGA/CPLD architecture in collaboration with system architects and hardware/software engineers.
• Write RTL code, create design specs, and develop test plans for traceability.
• Lead back end design flow including constraints, floor planning and timing analysis.
• Perform pre/post synthesis simulations and validation, and debug on board.
• Mentor junior engineers and provide training and technical guidance.
• Collaborate with cross functional teams to ensure delivery of high-performance systems.

Skills

Verilog / SystemVerilog

RTL design

FPGA / CPLD design

Xilinx & Intel (Altera) FPGA

Lattice CPLD/FPGA

UVM

C/C++

Shell / Python

PCB schematics understanding

PCIe/USB/Ethernet/DDR/LVDS

Education

Bachelors or Masters in Engineering (Electrical/Computer/Systems)

Tools

ISE

Vivado

Quartus II

Modelsim

Diamond

Job description

Celestica Malaysia Penang is seeking an FPGA/CPLD engineer to design, implement and validate FPGA/CPLD solutions for data center platforms. You will define architecture, write RTL, run simulations, and validate hardware with hardware/software teams to ensure robust, high-quality products.

The role requires deep expertise in Verilog/SystemVerilog, FPGA tools, and high-speed serial interfaces, with collaboration across hardware and software groups and opportunities to mentor junior engineers.