Senior Lead Engineer, Hardware Design (CPLD)

Celestica; Penang; On-site; MYR 70,000 - 100,000; Full time

Job summary

Celestica in Penang is seeking an FPGA/CPLD Engineer to enhance data center solutions through the design and implementation of FPGA/CPLD solutions. The ideal candidate should have a Bachelor's or Master's degree in Computer Science or Electrical Engineering and significant experience (10+ years for BSEE or 5+ years for MSEE) in FPGA/CPLD technologies. Key responsibilities include collaborating with cross-functional teams, performing design validations, and mentoring junior staff, with proficiency in Verilog and various debugging tools. This position does not allow remote work.

Qualifications

• 10+ years of FPGA/CPLD experience with BSEE or 5+ years with MSEE.
• In-depth knowledge of Verilog, SystemVerilog, and RTL design.
• Proficient in using hardware debugging tools.

Responsibilities

• Design, implement, and validate FPGA/CPLD solutions for data center systems.
• Collaborate with hardware and software teams to meet integration requirements.
• Provide mentoring and technical guidance to junior engineers.

Skills

Verilog

SystemVerilog

FPGA/CPLD design tools (Vivado, Quartus, ModelSim)

high-speed serial protocols (PCIe, USB, Ethernet, DDR, LVDS)

problem-solving skills

communication skills

Interpersonal skills

Education

Bachelor's or Master's in Computer Science or Electrical Engineering

Tools

Oscilloscopes

Multimeters

Logic analyzers

Job description

Overview

Req ID: 134844 | Remote Position: No | Region: Asia | Country: Malaysia | State/Province: Bayan Lepas | City: Penang

General Overview

Functional Area: Engineering

Career Stream: Design Engineering Hardware

SAP Short Name: SLE-ENG-DHW

Job Level: Level 09

IC/MGR: Individual Contributor

Direct/Indirect Indicator: Indirect

Summary

The FPGA/CPLD engineer will play a key role in designing, implementing, and validating FPGA/CPLD based solutions for data center server, storage, and switching platforms. The role involves defining system FPGA/CPLD architecture, technical proposals and part selection, writing RTL code, running simulations, FPGA/CPLD schematic and PCB design review, and validating designs on hardware. You will be responsible for optimizing designs to meet system requirements and working closely with hardware and software engineers to ensure full integration. This position works in a cross functional team with designers, customers, and project leaders to ensure robust and high quality product development. The FPGA/CPLD engineer will also help improve designs based on feedback from areas such as manufacturing, reliability, and testing.

Responsibilities

• Work closely with system architecture, hardware designer and software designer to understand/define the architecture requirements.
• Create the design specification, test plans, and reports to ensure design traceability.
• Cooperate with hardware engineer on the logic part schematic design/review, etc.
• On time delivery of the RTL design and module level verification and test case definition.
• Perform pre-synthesis and post-synthesis simulation and validation.
• Drive the entire back-end design flow including design constraints, floor plan and timing analysis.
• Lead debugging and failure analysis efforts during FPGA/CPLD on-board validation.
• Collaborate with peers including different function teams to ensure the successful delivery of high-performance systems.
• As a mentor to junior engineers, provide training and technical guidance.
• Provide accurate and timely project schedule estimates, meet project milestone schedules.

Job Requirements

• Bachelors or Masters in Computer Science, Electrical Engineering, or related fields.
• BSEE with 10+ years of FPGA/CPLD experience or MSEE with 5+ years of relevant experience with Xilinx and Intel (Altera) FPGA and Lattice CPLD/FPGA.
• In-depth knowledge of Verilog, SystemVerilog, RTL design, FPGA/CPLD design tools (e.g., Vivado, Quartus, ModelSim, etc.).
• Knowledge of high-speed serial protocols such as PCIe, USB, Ethernet, DDR, LVDS; familiar with SPI, eSPI, I2C, UART, LPC, MDIO.
• Familiar with UVM constrained-random coverage-driven concepts, assertion-based verification and functional coverage techniques.
• Proficient in understanding hardware schematics and PCB designs for FPGA/CPLD pinout constraints and on-board validation.
• Proficient in using oscilloscopes, multimeters, logic analyzers, and other hardware debugging and testing tools.
• Excellent problem solving, communication skills, and English proficiency; strong interpersonal skills and ability to understand customer needs and perspectives.
• Demonstrated ability to multi-task on multiple projects.

Additional Preferred Requirements

• In-depth knowledge of data center server, storage, and switching platforms architecture, with expertise in FPGA/CPLD roles inside the system, FPGA/CPLD part selection, and technical proposal development.
• Familiar with hardware development processes, extensive experience in hardware design, bring-up, and troubleshooting; proficient in Intel/AMD x86 CPU architecture and power-up sequencing.
• In-depth knowledge of secure boot design principles and implementation, providing suitable secure boot solutions for different systems.
• Proficient in C/C++, with experience in FPGA/CPLD feature software driver development and verification; familiarity with MicroBlaze or Nios II or MCU development is a plus.
• Proficient in Shell/Python development, creating scripts based on system requirements for testing purposes.

Equal Opportunity

Celestica is an equal opportunity employer. All qualified applicants will receive consideration for employment and will not be discriminated against on any protected status.